@@ -376,6 +376,41 @@ static void fdt_add_bbram_node(VersalVirt *s)
g_free(name);
}
+static void fdt_add_efuse_ctrl_node(VersalVirt *s)
+{
+ const char compat[] = TYPE_XLNX_VERSAL_EFUSE_CTRL;
+ const char interrupt_names[] = "pmc_efuse";
+ char *name = g_strdup_printf("/pmc_efuse@%x", MM_PMC_EFUSE_CTRL);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_EFUSE_IRQ,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+ qemu_fdt_setprop(s->fdt, name, "interrupt-names",
+ interrupt_names, sizeof(interrupt_names));
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, MM_PMC_EFUSE_CTRL,
+ 2, MM_PMC_EFUSE_CTRL_SIZE);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+}
+
+static void fdt_add_efuse_cache_node(VersalVirt *s)
+{
+ const char compat[] = TYPE_XLNX_VERSAL_EFUSE_CACHE;
+ char *name = g_strdup_printf("/xlnx_pmc_efuse_cache@%x",
+ MM_PMC_EFUSE_CACHE);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, MM_PMC_EFUSE_CACHE,
+ 2, MM_PMC_EFUSE_CACHE_SIZE);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+}
+
static void fdt_nop_memory_nodes(void *fdt, Error **errp)
{
Error *err = NULL;
@@ -591,6 +626,8 @@ static void versal_virt_init(MachineState *machine)
fdt_add_sd_nodes(s);
fdt_add_rtc_node(s);
fdt_add_bbram_node(s);
+ fdt_add_efuse_ctrl_node(s);
+ fdt_add_efuse_cache_node(s);
fdt_add_cpu_nodes(s, psci_conduit);
fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
@@ -329,6 +329,44 @@ static void versal_create_bbram(Versal *s, qemu_irq *pic)
sysbus_connect_irq(sbd, 0, pic[VERSAL_BBRAM_APB_IRQ_0]);
}
+static void versal_realize_efuse_part(Versal *s, Object *dev, hwaddr base)
+{
+ SysBusDevice *part = SYS_BUS_DEVICE(dev);
+
+ object_property_set_link(OBJECT(part), "efuse",
+ OBJECT(&s->pmc.efuse.bits), &error_abort);
+
+ sysbus_realize(part, &error_abort);
+ memory_region_add_subregion(&s->mr_ps, base,
+ sysbus_mmio_get_region(part, 0));
+}
+
+static void versal_create_efuse(Versal *s, qemu_irq *pic)
+{
+ Object *bits = OBJECT(&s->pmc.efuse.bits);
+ Object *ctrl = OBJECT(&s->pmc.efuse.ctrl);
+ Object *cache = OBJECT(&s->pmc.efuse.cache);
+
+ object_initialize_child(OBJECT(s), "efuse-ctrl", &s->pmc.efuse.ctrl,
+ TYPE_XLNX_VERSAL_EFUSE_CTRL);
+
+ object_initialize_child(OBJECT(s), "efuse-cache", &s->pmc.efuse.cache,
+ TYPE_XLNX_VERSAL_EFUSE_CACHE);
+
+ object_initialize_child_with_props(ctrl, "efuse-bits", bits,
+ sizeof(s->pmc.efuse.bits),
+ TYPE_XLNX_EFUSE, &error_abort,
+ "efuse-nr", "3",
+ "efuse-size", "8192",
+ NULL);
+
+ qdev_realize(DEVICE(bits), NULL, &error_abort);
+ versal_realize_efuse_part(s, ctrl, MM_PMC_EFUSE_CTRL);
+ versal_realize_efuse_part(s, cache, MM_PMC_EFUSE_CACHE);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(ctrl), 0, pic[VERSAL_EFUSE_IRQ]);
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -416,6 +454,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_rtc(s, pic);
versal_create_xrams(s, pic);
versal_create_bbram(s, pic);
+ versal_create_efuse(s, pic);
versal_map_ddr(s);
versal_unimp(s);
@@ -25,6 +25,7 @@
#include "hw/usb/xlnx-usb-subsystem.h"
#include "hw/misc/xlnx-versal-xramc.h"
#include "hw/nvram/xlnx-bbram.h"
+#include "hw/nvram/xlnx-versal-efuse.h"
#define TYPE_XLNX_VERSAL "xlnx-versal"
OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
@@ -81,6 +82,11 @@ struct Versal {
XlnxZynqMPRTC rtc;
XlnxBBRam bbram;
+ struct {
+ XlnxVersalEFuseCtrl ctrl;
+ XlnxVersalEFuseCache cache;
+ XLNXEFuse bits;
+ } efuse;
} pmc;
struct {
@@ -110,6 +116,7 @@ struct Versal {
#define VERSAL_BBRAM_APB_IRQ_0 121
#define VERSAL_RTC_APB_ERR_IRQ 121
#define VERSAL_SD0_IRQ_0 126
+#define VERSAL_EFUSE_IRQ 139
#define VERSAL_RTC_ALARM_IRQ 142
#define VERSAL_RTC_SECONDS_IRQ 143
@@ -175,6 +182,11 @@ struct Versal {
#define MM_PMC_SD0_SIZE 0x10000
#define MM_PMC_BBRAM_CTRL 0xf11f0000
#define MM_PMC_BBRAM_CTRL_SIZE 0x00050
+#define MM_PMC_EFUSE_CTRL 0xf1240000
+#define MM_PMC_EFUSE_CTRL_SIZE 0x00104
+#define MM_PMC_EFUSE_CACHE 0xf1250000
+#define MM_PMC_EFUSE_CACHE_SIZE 0x00C00
+
#define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000
#define MM_PMC_RTC 0xf12a0000
Connect the support for Versal eFUSE one-time field-programmable bit array. Signed-off-by: Tong Ho <tong.ho@xilinx.com> --- hw/arm/xlnx-versal-virt.c | 37 ++++++++++++++++++++++++++++++++++ hw/arm/xlnx-versal.c | 39 ++++++++++++++++++++++++++++++++++++ include/hw/arm/xlnx-versal.h | 12 +++++++++++ 3 files changed, 88 insertions(+)