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a="42584013" X-IronPort-AV: E=Sophos;i="5.84,365,1620658800"; d="scan'208";a="42584013" Received: from unknown (HELO oym-r1.gw.nic.fujitsu.com) ([210.162.30.89]) by esa6.hc1455-7.c3s2.iphmx.com with ESMTP; 31 Aug 2021 17:29:46 +0900 Received: from oym-m2.gw.nic.fujitsu.com (oym-nat-oym-m2.gw.nic.fujitsu.com [192.168.87.59]) by oym-r1.gw.nic.fujitsu.com (Postfix) with ESMTP id 3386C248D04; Tue, 31 Aug 2021 17:29:44 +0900 (JST) Received: from oym-om3.fujitsu.com (oym-om3.o.css.fujitsu.com [10.85.58.163]) by oym-m2.gw.nic.fujitsu.com (Postfix) with ESMTP id 6C5DFAF453; Tue, 31 Aug 2021 17:29:43 +0900 (JST) Received: from localhost.localdomain (n3235113.np.ts.nmh.cs.fujitsu.co.jp [10.123.235.113]) by oym-om3.fujitsu.com (Postfix) with ESMTP id 3F96040164EBE; Tue, 31 Aug 2021 17:29:43 +0900 (JST) From: Shuuichirou Ishii To: peter.maydell@linaro.org, drjones@redhat.com, qemu-arm@nongnu.org Subject: [PATCH v6 3/3] tests/arm-cpu-features: Add A64FX processor related Date: Tue, 31 Aug 2021 17:29:40 +0900 Message-Id: <20210831082940.2811719-4-ishii.shuuichir@fujitsu.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210831082940.2811719-1-ishii.shuuichir@fujitsu.com> References: <20210831082940.2811719-1-ishii.shuuichir@fujitsu.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 Received-SPF: pass client-ip=68.232.139.139; envelope-from=ishii.shuuichir@fujitsu.com; helo=esa6.hc1455-7.c3s2.iphmx.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, ishii.shuuichir@fujitsu.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Shuuichirou Ishii Reviewed-by: Andrew Jones --- tests/qtest/arm-cpu-features.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index 8252b85bb8..90a87f0ea9 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -473,6 +473,19 @@ static void test_query_cpu_model_expansion(const void *data) assert_has_feature_enabled(qts, "cortex-a57", "pmu"); assert_has_feature_enabled(qts, "cortex-a57", "aarch64"); + assert_has_feature_enabled(qts, "a64fx", "pmu"); + assert_has_feature_enabled(qts, "a64fx", "aarch64"); + /* + * A64FX does not support any other vector lengths besides those + * that are enabled by default(128bit, 256bits, 512bit). + */ + assert_has_feature_enabled(qts, "a64fx", "sve"); + assert_sve_vls(qts, "a64fx", 0xb, NULL); + assert_error(qts, "a64fx", "cannot enable sve384", + "{ 'sve384': true }"); + assert_error(qts, "a64fx", "cannot enable sve640", + "{ 'sve640': true }"); + sve_tests_default(qts, "max"); pauth_tests_default(qts, "max");