[v14,4/8,RISCV_PM] Add J extension state description

Commit Message

Alexey Baturo Oct. 17, 2021, 5:27 p.m. UTC

Signed-off-by: Alexey Baturo <[e-mail]>
---
 target/riscv/machine.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Alistair Francis Oct. 19, 2021, 6:53 a.m. UTC | #1

On Mon, Oct 18, 2021 at 3:36 AM Alexey Baturo <[e-mail]> wrote:
>
> Signed-off-by: Alexey Baturo <[e-mail]>
> ---
>  target/riscv/machine.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/target/riscv/machine.c b/target/riscv/machine.c
> index 16a08302da..4d99880797 100644
> --- a/target/riscv/machine.c
> +++ b/target/riscv/machine.c
> @@ -84,6 +84,14 @@ static bool vector_needed(void *opaque)
>      return riscv_has_ext(env, RVV);
>  }
>
> +static bool pointermasking_needed(void *opaque)
> +{
> +    RISCVCPU *cpu = opaque;
> +    CPURISCVState *env = &cpu->env;
> +
> +    return riscv_has_ext(env, RVJ);
> +}
> +
>  static const VMStateDescription vmstate_vector = {
>      .name = "cpu/vector",
>      .version_id = 1,
> @@ -138,6 +146,24 @@ static const VMStateDescription vmstate_hyper = {
>      }
>  };
>
> +static const VMStateDescription vmstate_pointermasking = {
> +    .name = "cpu/pm",

Can we write "cpu/pointer_masking"? pm sounds like power management

Alistair

Alexey Baturo Oct. 19, 2021, 7:02 a.m. UTC | #2

Sure, will fix that.
Thanks

вт, 19 окт. 2021 г. в 09:53, Alistair Francis <[e-mail]>:

> On Mon, Oct 18, 2021 at 3:36 AM Alexey Baturo <[e-mail]>
> wrote:
> >
> > Signed-off-by: Alexey Baturo <[e-mail]>
> > ---
> >  target/riscv/machine.c | 27 +++++++++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> >
> > diff --git a/target/riscv/machine.c b/target/riscv/machine.c
> > index 16a08302da..4d99880797 100644
> > --- a/target/riscv/machine.c
> > +++ b/target/riscv/machine.c
> > @@ -84,6 +84,14 @@ static bool vector_needed(void *opaque)
> >      return riscv_has_ext(env, RVV);
> >  }
> >
> > +static bool pointermasking_needed(void *opaque)
> > +{
> > +    RISCVCPU *cpu = opaque;
> > +    CPURISCVState *env = &cpu->env;
> > +
> > +    return riscv_has_ext(env, RVJ);
> > +}
> > +
> >  static const VMStateDescription vmstate_vector = {
> >      .name = "cpu/vector",
> >      .version_id = 1,
> > @@ -138,6 +146,24 @@ static const VMStateDescription vmstate_hyper = {
> >      }
> >  };
> >
> > +static const VMStateDescription vmstate_pointermasking = {
> > +    .name = "cpu/pm",
>
> Can we write "cpu/pointer_masking"? pm sounds like power management
>
> Alistair
>

Patch

diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 16a08302da..4d99880797 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -84,6 +84,14 @@  static bool vector_needed(void *opaque)
     return riscv_has_ext(env, RVV);
 }
 
+static bool pointermasking_needed(void *opaque)
+{
+    RISCVCPU *cpu = opaque;
+    CPURISCVState *env = &cpu->env;
+
+    return riscv_has_ext(env, RVJ);
+}
+
 static const VMStateDescription vmstate_vector = {
     .name = "cpu/vector",
     .version_id = 1,
@@ -138,6 +146,24 @@  static const VMStateDescription vmstate_hyper = {
     }
 };
 
+static const VMStateDescription vmstate_pointermasking = {
+    .name = "cpu/pm",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .needed = pointermasking_needed,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINTTL(env.mmte, RISCVCPU),
+        VMSTATE_UINTTL(env.mpmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.mpmbase, RISCVCPU),
+        VMSTATE_UINTTL(env.spmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.spmbase, RISCVCPU),
+        VMSTATE_UINTTL(env.upmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.upmbase, RISCVCPU),
+
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 const VMStateDescription vmstate_riscv_cpu = {
     .name = "cpu",
     .version_id = 2,
@@ -189,6 +215,7 @@  const VMStateDescription vmstate_riscv_cpu = {
         &vmstate_pmp,
         &vmstate_hyper,
         &vmstate_vector,
+        &vmstate_pointermasking,
         NULL
     }
 };