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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT024.mail.protection.outlook.com (10.13.172.159) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4608.15 via Frontend Transport; Tue, 19 Oct 2021 14:21:03 +0000 Received: from localhost (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.15; Tue, 19 Oct 2021 09:21:02 -0500 From: Michael Roth To: CC: , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alexander Bulekov , Richard Henderson , "Michael S . Tsirkin" Subject: [PATCH 26/64] hw/pci-host/q35: Ignore write of reserved PCIEXBAR LENGTH field Date: Tue, 19 Oct 2021 09:09:06 -0500 Message-ID: <20211019140944.152419-27-michael.roth@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019140944.152419-1-michael.roth@amd.com> References: <20211019140944.152419-1-michael.roth@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 127d0520-4e94-4318-8f50-08d9930baeca X-MS-TrafficTypeDiagnostic: DM6PR12MB4339: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:197; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5MiBg5i7OPgyZhw5CGthQ/JkCT6z9l9HERzpPoo6gxDoP1uI51yLdT/jbR/RjV4n3/tIAl95f4sRlKxH260ZrAy9EDTYpkKr3pkWY4O1OSNGFY9sFDi88Bgdtq97SfsOBKvwTlBP6aKSRWIo9C6zWc4kXHFzNNa77oAazL2XES2Rq8HTS3nJXQkFAuKuN7LA8Uw7t1MkhPctYF87wWG+fevfIYvA5IChSfSNh39IYvQn7lmUt6j5zBWQ7jbzMTO15fGHUxmGUXVdKprrPyaM3MHEaTV+jBwQihnzVbs4TivsUMDi7mlOwzij1FbSfxxS+dOBiB1A2AaKaW3Rm/P3aMLT3MaKNofiY+MRDM7qWDDnPdN3HVFk9GEflQ/vdAZsQmmduhdrFHwGymiev8Xlasl0M20RdZ1n1kp5iQwLTkZFNWeNmvcBr9PCnI+gn2Afkeob8kjNGmsE5hYbYsp34SnPMXattrNWfXa2fGxT3DggoaBRvwV0Cn3DLOPAPhFjY6NxWlOUCXU7Z1vdZpFJs6iL4AGFpOVgfxZBjBD9PB1PAGASOawMCMssjapzD4UE0CgfgSG9PfBefw59n6i5XSgDIQiSNbXzrI2G4Ls4droLtJ8qRe6qTR0wArzNy0xuUC4IFQE1aqnE5WBkRCE0eUnGfC8qDvUQqNmulV9EK3CBkhD2PHWsSWHzyoTBlUyadkzssqOTDSffKpWMwlZCVlJ527QDFOvsQ8Ph990afqxdTtIGioCDvIllzi7xKnijTVMgxoec3DhANldKj6FYr/G2+6L7u9lbItVKZW0fd9EV3U2UYX4ykEFfDDF9beeS X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(336012)(508600001)(356005)(1076003)(47076005)(16526019)(6916009)(966005)(2616005)(81166007)(36756003)(4326008)(86362001)(82310400003)(316002)(83380400001)(36860700001)(54906003)(70586007)(5660300002)(186003)(8936002)(426003)(70206006)(26005)(8676002)(44832011)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2021 14:21:03.5310 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 127d0520-4e94-4318-8f50-08d9930baeca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT024.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4339 Received-SPF: softfail client-ip=40.107.243.74; envelope-from=Michael.Roth@amd.com; helo=NAM12-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé libFuzzer triggered the following assertion: cat << EOF | qemu-system-i386 -M pc-q35-5.0 \ -nographic -monitor none -serial none \ -qtest stdio -d guest_errors -trace pci\* outl 0xcf8 0xf2000060 outl 0xcfc 0x8400056e EOF pci_cfg_write mch 00:0 @0x60 <- 0x8400056e Aborted (core dumped) This is because guest wrote MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_RVD (reserved value) to the PCIE XBAR register. There is no indication on the datasheet about what occurs when this value is written. Simply ignore it on QEMU (and report an guest error): pci_cfg_write mch 00:0 @0x60 <- 0x8400056e Q35: Reserved PCIEXBAR LENGTH pci_cfg_read mch 00:0 @0x0 -> 0x8086 pci_cfg_read mch 00:0 @0x0 -> 0x29c08086 ... Cc: qemu-stable@nongnu.org Reported-by: Alexander Bulekov BugLink: https://bugs.launchpad.net/qemu/+bug/1878641 Fixes: df2d8b3ed4 ("q35: Introduce q35 pc based chipset emulator") Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210526142438.281477-1-f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Alexander Bulekov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit 9b0ca75e0196a72523232063db1e07ae36a5077a) Signed-off-by: Michael Roth --- hw/pci-host/q35.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 2eb729dff5..0f37cf056a 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -29,6 +29,7 @@ */ #include "qemu/osdep.h" +#include "qemu/log.h" #include "hw/i386/pc.h" #include "hw/pci-host/q35.h" #include "hw/qdev-properties.h" @@ -318,6 +319,8 @@ static void mch_update_pciexbar(MCHPCIState *mch) addr_mask |= MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK; break; case MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_RVD: + qemu_log_mask(LOG_GUEST_ERROR, "Q35: Reserved PCIEXBAR LENGTH\n"); + return; default: abort(); }