diff mbox series

[40/64] hw/nvme: fix missing check for PMR capability

Message ID 20211019140944.152419-41-michael.roth@amd.com (mailing list archive)
State New, archived
Headers show
Series Patch Round-up for stable 6.0.1, freeze on 2021-10-26 | expand

Commit Message

Michael Roth Oct. 19, 2021, 2:09 p.m. UTC
From: Klaus Jensen <k.jensen@samsung.com>

Qiang Liu reported that an access on an unknown address is triggered in
memory_region_set_enabled because a check on CAP.PMRS is missing for the
PMRCTL register write when no PMR is configured.

Cc: qemu-stable@nongnu.org
Fixes: 75c3c9de961d ("hw/block/nvme: disable PMR at boot up")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/362
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
(cherry picked from commit 2b02aabc9d02f9e95946cf639f546bb61f1721b7)
Signed-off-by: Michael Roth <michael.roth@amd.com>
---
 hw/block/nvme.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 2c7ca587c5..8f4e1fc3ac 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -5589,6 +5589,10 @@  static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
                        "invalid write to PMRCAP register, ignored");
         return;
     case 0xe04: /* PMRCTL */
+        if (!NVME_CAP_PMRS(n->bar.cap)) {
+            return;
+        }
+
         n->bar.pmrctl = data;
         if (NVME_PMRCTL_EN(data)) {
             memory_region_set_enabled(&n->pmr.dev->mr, true);