diff mbox series

[1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal()

Message ID 20211024161619.325903-2-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show
Series target/alpha,arm,ppc: More uses of tcg_constant() | expand

Commit Message

Philippe Mathieu-Daudé Oct. 24, 2021, 4:16 p.m. UTC 
Avoid using a TCG temporary by moving the flag and
exception address to the constant pool.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/alpha/translate.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Richard Henderson Oct. 24, 2021, 9:19 p.m. UTC | #1 
On 10/24/21 9:16 AM, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the flag and
> exception address to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/alpha/translate.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index a4c3f43e720..326d4216aad 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -1191,20 +1191,17 @@  static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode)
     return gen_excp(ctx, EXCP_CALL_PAL, palcode);
 #else
     {
-        TCGv tmp = tcg_temp_new();
         uint64_t exc_addr = ctx->base.pc_next;
         uint64_t entry = ctx->palbr;
 
         if (ctx->tbflags & ENV_FLAG_PAL_MODE) {
             exc_addr |= 1;
         } else {
-            tcg_gen_movi_i64(tmp, 1);
-            st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT);
+            st_flag_byte(tcg_constant_i64(1), ENV_FLAG_PAL_SHIFT);
         }
 
-        tcg_gen_movi_i64(tmp, exc_addr);
-        tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
-        tcg_temp_free(tmp);
+        tcg_gen_st_i64(tcg_constant_i64(exc_addr),
+                       cpu_env, offsetof(CPUAlphaState, exc_addr));
 
         entry += (palcode & 0x80
                   ? 0x2000 + (palcode - 0x80) * 64