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Mon, 25 Oct 2021 05:43:47 -0700 (PDT) From: Rahul Pathak To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, bmeng.cn@gmail.com, Alistair.Francis@wdc.com Subject: [PATCH v2 1/2] target/riscv: Add priv spec 1.12.0 version check Date: Mon, 25 Oct 2021 18:13:18 +0530 Message-Id: <20211025124319.195290-2-rpathak@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211025124319.195290-1-rpathak@ventanamicro.com> References: <20211025124319.195290-1-rpathak@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=rpathak@ventanamicro.com; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rpathak@ventanamicro.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Rahul Pathak --- target/riscv/cpu.c | 4 +++- target/riscv/cpu.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 788fa0b11c..83c3814a5a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -405,7 +405,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } if (cpu->cfg.priv_spec) { - if (!g_strcmp0(cpu->cfg.priv_spec, "v1.11.0")) { + if (!g_strcmp0(cpu->cfg.priv_spec, "v1.12.0")) { + priv_version = PRIV_VERSION_1_12_0; + } else if (!g_strcmp0(cpu->cfg.priv_spec, "v1.11.0")) { priv_version = PRIV_VERSION_1_11_0; } else if (!g_strcmp0(cpu->cfg.priv_spec, "v1.10.0")) { priv_version = PRIV_VERSION_1_10_0; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a33dc30be8..67c52e6f9e 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -79,6 +79,7 @@ enum { #define PRIV_VERSION_1_10_0 0x00011000 #define PRIV_VERSION_1_11_0 0x00011100 +#define PRIV_VERSION_1_12_0 0x00011200 #define VEXT_VERSION_0_07_1 0x00000701