[01/13] target/riscv: Sign extend pc for different ol

Commit Message

LIU Zhiwei Nov. 1, 2021, 10:01 a.m. UTC

When pc is written, it is sign-extended to fill the widest supported XLEN.

Signed-off-by: LIU Zhiwei <[e-mail]>
---
 target/riscv/translate.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

Comments

Richard Henderson Nov. 1, 2021, 10:29 a.m. UTC | #1

On 11/1/21 6:01 AM, LIU Zhiwei wrote:
> +static void gen_set_pc(DisasContext *ctx, target_ulong dest)
> +{
> +    TCGv t = tcg_constant_tl(dest);
> +    switch (get_ol(ctx)) {
> +    case MXL_RV32:
> +        tcg_gen_ext32s_tl(cpu_pc, t);

Don't compute with tcg to do what you can in C.  Dest is constant.
And I think that XL is more appropriate than OL (which *should* be the same, but still 
looks weird).

     if (get_xl(ctx) == MXL_RV32) {
         dest = (int32_t)dest;
     }
     tcg_gen_movi_tl(cpu_pc, dest);


r~

Patch

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 1d57bc97b5..7d78a3561e 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -150,16 +150,31 @@  static void gen_check_nanbox_s(TCGv_i64 out, TCGv_i64 in)
     tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan);
 }
 
+static void gen_set_pc(DisasContext *ctx, target_ulong dest)
+{
+    TCGv t = tcg_constant_tl(dest);
+    switch (get_ol(ctx)) {
+    case MXL_RV32:
+        tcg_gen_ext32s_tl(cpu_pc, t);
+        break;
+    case MXL_RV64:
+        tcg_gen_mov_tl(cpu_pc, t);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
 static void generate_exception(DisasContext *ctx, int excp)
 {
-    tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
+    gen_set_pc(ctx, ctx->base.pc_next);
     gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
     ctx->base.is_jmp = DISAS_NORETURN;
 }
 
 static void generate_exception_mtval(DisasContext *ctx, int excp)
 {
-    tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
+    gen_set_pc(ctx, ctx->base.pc_next);
     tcg_gen_st_tl(cpu_pc, cpu_env, offsetof(CPURISCVState, badaddr));
     gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
     ctx->base.is_jmp = DISAS_NORETURN;
@@ -179,10 +194,10 @@  static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
 {
     if (translator_use_goto_tb(&ctx->base, dest)) {
         tcg_gen_goto_tb(n);
-        tcg_gen_movi_tl(cpu_pc, dest);
+        gen_set_pc(ctx, dest);
         tcg_gen_exit_tb(ctx->base.tb, n);
     } else {
-        tcg_gen_movi_tl(cpu_pc, dest);
+        gen_set_pc(ctx, dest);
         tcg_gen_lookup_and_goto_ptr();
     }
 }