From patchwork Thu Nov 11 14:13:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Peng X-Patchwork-Id: 12614949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBB62C433F5 for ; Thu, 11 Nov 2021 14:30:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6C38961183 for ; Thu, 11 Nov 2021 14:30:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6C38961183 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:52596 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mlB5t-000206-HN for qemu-devel@archiver.kernel.org; Thu, 11 Nov 2021 09:30:25 -0500 Received: from eggs.gnu.org ([209.51.188.92]:41146) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mlAtD-00049f-9n for qemu-devel@nongnu.org; Thu, 11 Nov 2021 09:17:19 -0500 Received: from mga07.intel.com ([134.134.136.100]:50703) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mlAtB-0006ra-44 for qemu-devel@nongnu.org; Thu, 11 Nov 2021 09:17:19 -0500 X-IronPort-AV: E=McAfee;i="6200,9189,10164"; a="296353429" X-IronPort-AV: E=Sophos;i="5.87,226,1631602800"; d="scan'208";a="296353429" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2021 06:17:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,226,1631602800"; d="scan'208";a="492556372" Received: from chaop.bj.intel.com ([10.240.192.101]) by orsmga007.jf.intel.com with ESMTP; 11 Nov 2021 06:17:01 -0800 From: Chao Peng To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-fsdevel@vger.kernel.org, qemu-devel@nongnu.org Subject: [RFC PATCH 13/13] machine: Add 'private-memory-backend' property Date: Thu, 11 Nov 2021 22:13:52 +0800 Message-Id: <20211111141352.26311-14-chao.p.peng@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211111141352.26311-1-chao.p.peng@linux.intel.com> References: <20211111141352.26311-1-chao.p.peng@linux.intel.com> Received-SPF: none client-ip=134.134.136.100; envelope-from=chao.p.peng@linux.intel.com; helo=mga07.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Wanpeng Li , jun.nakajima@intel.com, david@redhat.com, "J . Bruce Fields" , dave.hansen@intel.com, "H . Peter Anvin" , Chao Peng , ak@linux.intel.com, Jonathan Corbet , Joerg Roedel , x86@kernel.org, Hugh Dickins , Ingo Molnar , Borislav Petkov , luto@kernel.org, Thomas Gleixner , Vitaly Kuznetsov , Jim Mattson , Sean Christopherson , susie.li@intel.com, Jeff Layton , john.ji@intel.com, Yu Zhang , Paolo Bonzini , Andrew Morton , "Kirill A . Shutemov" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Chao Peng --- hw/core/machine.c | 38 ++++++++++++++++++++++++++++++++++++++ hw/i386/pc.c | 22 ++++++++++++++++------ include/hw/boards.h | 2 ++ softmmu/vl.c | 16 ++++++++++------ 4 files changed, 66 insertions(+), 12 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 067f42b528..d092bf400b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -589,6 +589,22 @@ static void machine_set_memdev(Object *obj, const char *value, Error **errp) ms->ram_memdev_id = g_strdup(value); } +static char *machine_get_private_memdev(Object *obj, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + return g_strdup(ms->private_ram_memdev_id); +} + +static void machine_set_private_memdev(Object *obj, const char *value, + Error **errp) +{ + MachineState *ms = MACHINE(obj); + + g_free(ms->private_ram_memdev_id); + ms->private_ram_memdev_id = g_strdup(value); +} + static void machine_init_notify(Notifier *notifier, void *data) { MachineState *machine = MACHINE(qdev_get_machine()); @@ -962,6 +978,13 @@ static void machine_class_init(ObjectClass *oc, void *data) object_class_property_set_description(oc, "memory-backend", "Set RAM backend" "Valid value is ID of hostmem based backend"); + + object_class_property_add_str(oc, "private-memory-backend", + machine_get_private_memdev, + machine_set_private_memdev); + object_class_property_set_description(oc, "private-memory-backend", + "Set guest private RAM backend" + "Valid value is ID of hostmem based backend"); } static void machine_class_base_init(ObjectClass *oc, void *data) @@ -1208,6 +1231,21 @@ void machine_run_board_init(MachineState *machine) machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); } + if (machine->private_ram_memdev_id) { + Object *o; + HostMemoryBackend *backend; + o = object_resolve_path_type(machine->private_ram_memdev_id, + TYPE_MEMORY_BACKEND, NULL); + backend = MEMORY_BACKEND(o); + if (backend->guest_private) { + machine->private_ram = machine_consume_memdev(machine, backend); + } else { + error_report("memorybaend %s is not guest private memory.", + object_get_canonical_path_component(OBJECT(backend))); + exit(EXIT_FAILURE); + } + } + if (machine->numa_state) { numa_complete_configuration(machine); if (machine->numa_state->num_nodes) { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1276bfeee4..e6209428c1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -865,30 +865,40 @@ void pc_memory_init(PCMachineState *pcms, MachineClass *mc = MACHINE_GET_CLASS(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(pcms); + MemoryRegion *ram, *root_region; assert(machine->ram_size == x86ms->below_4g_mem_size + x86ms->above_4g_mem_size); linux_boot = (machine->kernel_filename != NULL); + *ram_memory = machine->ram; + + /* Map private memory if set. Shared memory will be mapped per request. */ + if (machine->private_ram) { + ram = machine->private_ram; + root_region = get_system_private_memory(); + } else { + ram = machine->ram; + root_region = system_memory; + } + /* * Split single memory region and use aliases to address portions of it, * done for backwards compatibility with older qemus. */ - *ram_memory = machine->ram; ram_below_4g = g_malloc(sizeof(*ram_below_4g)); - memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, + memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, 0, x86ms->below_4g_mem_size); - memory_region_add_subregion(system_memory, 0, ram_below_4g); + memory_region_add_subregion(root_region, 0, ram_below_4g); e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); if (x86ms->above_4g_mem_size > 0) { ram_above_4g = g_malloc(sizeof(*ram_above_4g)); memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", - machine->ram, + ram, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size); - memory_region_add_subregion(system_memory, 0x100000000ULL, - ram_above_4g); + memory_region_add_subregion(root_region, 0x100000000ULL, ram_above_4g); e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); } diff --git a/include/hw/boards.h b/include/hw/boards.h index 463a5514f9..dd6a3a3e03 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -313,11 +313,13 @@ struct MachineState { bool enable_graphics; ConfidentialGuestSupport *cgs; char *ram_memdev_id; + char *private_ram_memdev_id; /* * convenience alias to ram_memdev_id backend memory region * or to numa container memory region */ MemoryRegion *ram; + MemoryRegion *private_ram; DeviceMemoryState *device_memory; ram_addr_t ram_size; diff --git a/softmmu/vl.c b/softmmu/vl.c index ea05bb39c5..9665ccdb16 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -1985,17 +1985,15 @@ static bool have_custom_ram_size(void) return !!qemu_opt_get_size(opts, "size", 0); } -static void qemu_resolve_machine_memdev(void) +static void check_memdev(char *id) { - if (current_machine->ram_memdev_id) { + if (id) { Object *backend; ram_addr_t backend_size; - backend = object_resolve_path_type(current_machine->ram_memdev_id, - TYPE_MEMORY_BACKEND, NULL); + backend = object_resolve_path_type(id, TYPE_MEMORY_BACKEND, NULL); if (!backend) { - error_report("Memory backend '%s' not found", - current_machine->ram_memdev_id); + error_report("Memory backend '%s' not found", id); exit(EXIT_FAILURE); } backend_size = object_property_get_uint(backend, "size", &error_abort); @@ -2011,6 +2009,12 @@ static void qemu_resolve_machine_memdev(void) } ram_size = backend_size; } +} + +static void qemu_resolve_machine_memdev(void) +{ + check_memdev(current_machine->ram_memdev_id); + check_memdev(current_machine->private_ram_memdev_id); if (!xen_enabled()) { /* On 32-bit hosts, QEMU is limited by virtual address space */