@@ -569,6 +569,58 @@ static const struct cpudef ppc_defs[] = {
.tlb_size = 0x80,
.initfn = cpu_g4_init,
},
+ {
+ .iu_version = 0x80000000,
+ .name = "PowerPC,G4",
+ .icache_size = 0x8000,
+ .dcache_size = 0x8000,
+ .icache_sets = 0x80,
+ .dcache_sets = 0x80,
+ .icache_block_size = 0x20,
+ .dcache_block_size = 0x20,
+ .tlb_sets = 0x40,
+ .tlb_size = 0x80,
+ .initfn = cpu_g4_init,
+ },
+ {
+ .iu_version = 0x80010000,
+ .name = "PowerPC,G4",
+ .icache_size = 0x8000,
+ .dcache_size = 0x8000,
+ .icache_sets = 0x80,
+ .dcache_sets = 0x80,
+ .icache_block_size = 0x20,
+ .dcache_block_size = 0x20,
+ .tlb_sets = 0x40,
+ .tlb_size = 0x80,
+ .initfn = cpu_g4_init,
+ },
+ {
+ .iu_version = 0x80020000,
+ .name = "PowerPC,G4",
+ .icache_size = 0x8000,
+ .dcache_size = 0x8000,
+ .icache_sets = 0x80,
+ .dcache_sets = 0x80,
+ .icache_block_size = 0x20,
+ .dcache_block_size = 0x20,
+ .tlb_sets = 0x40,
+ .tlb_size = 0x80,
+ .initfn = cpu_g4_init,
+ },
+ {
+ .iu_version = 0x80030000,
+ .name = "PowerPC,G4",
+ .icache_size = 0x8000,
+ .dcache_size = 0x8000,
+ .icache_sets = 0x80,
+ .dcache_sets = 0x80,
+ .icache_block_size = 0x20,
+ .dcache_block_size = 0x20,
+ .tlb_sets = 0x40,
+ .tlb_size = 0x80,
+ .initfn = cpu_g4_init,
+ },
{
.iu_version = 0x00390000,
.name = "PowerPC,970",
This allows the processors from the 7450 family to pass the initial PVR verification. Enables 7441, 7445, 7447, 7447a, 7448, 7450, 7451, 7455, 7457 and 7457a. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> --- arch/ppc/qemu/init.c | 52 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)