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[1/3] target/m68k: Implement TRAPV

Message ID 20211130103752.72099-2-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/m68k: Implement conditional traps | expand

Commit Message

Richard Henderson Nov. 30, 2021, 10:37 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Laurent Vivier Nov. 30, 2021, 12:11 p.m. UTC | #1 
Le 30/11/2021 à 11:37, Richard Henderson a écrit :
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/m68k/translate.c | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
> 
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index af43c8eab8..858ba761fc 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -4863,6 +4863,22 @@ DISAS_INSN(trap)
>       gen_exception(s, s->base.pc_next, EXCP_TRAP0 + (insn & 0xf));
>   }
>   
> +static void do_trapcc(DisasContext *s, int cond)
> +{
> +    TCGLabel *over = gen_new_label();
> +
> +    /* Jump over if !cond. */
> +    gen_jmpcc(s, cond ^ 1, over);
> +
> +    gen_exception(s, s->base.pc_next, EXCP_TRAPCC);
> +    gen_set_label(over);
> +}
> +
> +DISAS_INSN(trapv)
> +{
> +    do_trapcc(s, 9); /* VS */
> +}
> +
>   static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
>   {
>       switch (reg) {
> @@ -6026,6 +6042,7 @@ void register_m68k_insns (CPUM68KState *env)
>       BASE(nop,       4e71, ffff);
>       INSN(rtd,       4e74, ffff, RTD);
>       BASE(rts,       4e75, ffff);
> +    INSN(trapv,     4e76, ffff, M68000);
>       INSN(rtr,       4e77, ffff, M68000);
>       BASE(jump,      4e80, ffc0);
>       BASE(jump,      4ec0, ffc0);
> 

Same question as for PATCH 2 regarding m68k_interrupt_all()

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index af43c8eab8..858ba761fc 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4863,6 +4863,22 @@  DISAS_INSN(trap)
     gen_exception(s, s->base.pc_next, EXCP_TRAP0 + (insn & 0xf));
 }
 
+static void do_trapcc(DisasContext *s, int cond)
+{
+    TCGLabel *over = gen_new_label();
+
+    /* Jump over if !cond. */
+    gen_jmpcc(s, cond ^ 1, over);
+
+    gen_exception(s, s->base.pc_next, EXCP_TRAPCC);
+    gen_set_label(over);
+}
+
+DISAS_INSN(trapv)
+{
+    do_trapcc(s, 9); /* VS */
+}
+
 static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
 {
     switch (reg) {
@@ -6026,6 +6042,7 @@  void register_m68k_insns (CPUM68KState *env)
     BASE(nop,       4e71, ffff);
     INSN(rtd,       4e74, ffff, RTD);
     BASE(rts,       4e75, ffff);
+    INSN(trapv,     4e76, ffff, M68000);
     INSN(rtr,       4e77, ffff, M68000);
     BASE(jump,      4e80, ffc0);
     BASE(jump,      4ec0, ffc0);