| Message ID | 20211221172157.2572503-1-vineetg@rivosinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: make H-extension non-experimental | expand |
On Wed, Dec 22, 2021 at 3:22 AM Vineet Gupta <vineetg@rivosinc.com> wrote: > > H-ext v1.0 was ratified recently as part of Privileged Spec 1.12. > So move it out of experimental. > > [1] https://wiki.riscv.org/display/TECH/Recently+Ratified+Extensions > > Signed-off-by: Vineet Gupta <vineetg@rivosinc.com> Thanks for the patch! There is already a similar patch on the mailing list though. Alistair > --- > target/riscv/cpu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 6ef3314bced8..a582179b1773 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -640,12 +640,12 @@ static Property riscv_cpu_properties[] = { > DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128), > DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), > > - /* These are experimental so mark with 'x-' */ > DEFINE_PROP_BOOL("zba", RISCVCPU, cfg.ext_zba, true), > DEFINE_PROP_BOOL("zbb", RISCVCPU, cfg.ext_zbb, true), > DEFINE_PROP_BOOL("zbc", RISCVCPU, cfg.ext_zbc, true), > DEFINE_PROP_BOOL("zbs", RISCVCPU, cfg.ext_zbs, true), > - DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), > + DEFINE_PROP_BOOL("h", RISCVCPU, cfg.ext_h, false), > + /* These are experimental so mark with 'x-' */ > DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false), > /* ePMP 0.9.3 */ > DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false), > -- > 2.30.2 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6ef3314bced8..a582179b1773 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -640,12 +640,12 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128), DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), - /* These are experimental so mark with 'x-' */ DEFINE_PROP_BOOL("zba", RISCVCPU, cfg.ext_zba, true), DEFINE_PROP_BOOL("zbb", RISCVCPU, cfg.ext_zbb, true), DEFINE_PROP_BOOL("zbc", RISCVCPU, cfg.ext_zbc, true), DEFINE_PROP_BOOL("zbs", RISCVCPU, cfg.ext_zbs, true), - DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), + DEFINE_PROP_BOOL("h", RISCVCPU, cfg.ext_h, false), + /* These are experimental so mark with 'x-' */ DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false), /* ePMP 0.9.3 */ DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false),
H-ext v1.0 was ratified recently as part of Privileged Spec 1.12. So move it out of experimental. [1] https://wiki.riscv.org/display/TECH/Recently+Ratified+Extensions Signed-off-by: Vineet Gupta <vineetg@rivosinc.com> --- target/riscv/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)