[v2] hw/sd: Add SDHC support for SD card SPI-mode

Commit Message

Frank Chang Dec. 28, 2021, 12:57 p.m. UTC

From: Frank Chang <[e-mail]>

In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
is not set to 1 correclty when the assigned SD image size is larger
than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
incorrectly. CCS bit should be set to 1 if we are using SDHC.

Also, as there's no power up emulation in SPI-mode.
The OCR register: Card power up status bit bit (busy) should also
be set to 1 when reset. (busy bit is set to LOW if the card has not
finished the power up routine.)

Signed-off-by: Frank Chang <[e-mail]>
Reviewed-by: Jim Shu <[e-mail]>
Reviewed-by: Philippe Mathieu-Daudé <[e-mail]>
---
 hw/sd/sd.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

Comments

Philippe Mathieu-Daudé Jan. 2, 2022, 8:57 p.m. UTC | #1

On 12/28/21 13:57, [e-mail] wrote:
> From: Frank Chang <[e-mail]>
> 
> In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
> is not set to 1 correclty when the assigned SD image size is larger
> than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
> incorrectly. CCS bit should be set to 1 if we are using SDHC.
> 
> Also, as there's no power up emulation in SPI-mode.
> The OCR register: Card power up status bit bit (busy) should also
> be set to 1 when reset. (busy bit is set to LOW if the card has not
> finished the power up routine.)
> 
> Signed-off-by: Frank Chang <[e-mail]>
> Reviewed-by: Jim Shu <[e-mail]>
> Reviewed-by: Philippe Mathieu-Daudé <[e-mail]>
> ---
>  hw/sd/sd.c | 24 +++++++++++++++++-------
>  1 file changed, 17 insertions(+), 7 deletions(-)

Thanks, queued to sdmmc-next.

Patch

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bb5dbff68c..3da5e3dada 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -290,12 +290,6 @@  FIELD(OCR, CARD_POWER_UP,              31,  1)
                                | R_OCR_CARD_CAPACITY_MASK \
                                | R_OCR_CARD_POWER_UP_MASK)
 
-static void sd_set_ocr(SDState *sd)
-{
-    /* All voltages OK */
-    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
-}
-
 static void sd_ocr_powerup(void *opaque)
 {
     SDState *sd = opaque;
@@ -311,6 +305,22 @@  static void sd_ocr_powerup(void *opaque)
     }
 }
 
+static void sd_set_ocr(SDState *sd)
+{
+    /* All voltages OK */
+    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
+
+    if (sd->spi) {
+        /*
+         * We don't need to emulate power up sequence in SPI-mode.
+         * Thus, the card's power up status bit should be set to 1 when reset.
+         * The card's capacity status bit should also be set if SD card size
+         * is larger than 2GB for SDHC support.
+         */
+        sd_ocr_powerup(sd);
+    }
+}
+
 static void sd_set_scr(SDState *sd)
 {
     sd->scr[0] = 0 << 4;        /* SCR structure version 1.0 */
@@ -560,6 +570,7 @@  static void sd_reset(DeviceState *dev)
 
     sd->state = sd_idle_state;
     sd->rca = 0x0000;
+    sd->size = size;
     sd_set_ocr(sd);
     sd_set_scr(sd);
     sd_set_cid(sd);
@@ -574,7 +585,6 @@  static void sd_reset(DeviceState *dev)
     memset(sd->function_group, 0, sizeof(sd->function_group));
     sd->erase_start = INVALID_ADDRESS;
     sd->erase_end = INVALID_ADDRESS;
-    sd->size = size;
     sd->blk_len = 0x200;
     sd->pwd_len = 0;
     sd->expecting_acmd = false;