diff mbox series

[1/2] target/ppc: Add popcntb instruction to POWER5+ processors

Message ID 20220105095142.3990430-2-clg@kaod.org (mailing list archive)
State New, archived
Headers show
Series spapr: Fix support of POWER5+ processors | expand

Commit Message

Cédric Le Goater Jan. 5, 2022, 9:51 a.m. UTC 
popcntb instruction was added in ISA v2.02. Add support for POWER5+
processors since they implement ISA v2.03.

PPC970 CPUs implement v2.01 and do not support popcntb.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 target/ppc/cpu_init.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Fabiano Rosas Jan. 5, 2022, 1:40 p.m. UTC | #1 
Cédric Le Goater <clg@kaod.org> writes:

> popcntb instruction was added in ISA v2.02. Add support for POWER5+
> processors since they implement ISA v2.03.
>
> PPC970 CPUs implement v2.01 and do not support popcntb.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
diff mbox series

Patch

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index cc93bff3fac4..f15a52259c90 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6957,6 +6957,7 @@  POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
                        PPC_MEM_SYNC | PPC_MEM_EIEIO |
                        PPC_MEM_TLBIE | PPC_MEM_TLBSYNC |
                        PPC_64B |
+                       PPC_POPCNTB |
                        PPC_SEGMENT_64B | PPC_SLBI;
     pcc->insns_flags2 = PPC2_FP_CVT_S64;
     pcc->msr_mask = (1ull << MSR_SF) |