[v4,02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

Commit Message

Yifei Jiang Jan. 10, 2022, 1:38 a.m. UTC

Add target/riscv/kvm.c to place kvm_arch_* function needed by
kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file.

Signed-off-by: Yifei Jiang <[e-mail]>
Signed-off-by: Mingwang Li <[e-mail]>
Reviewed-by: Alistair Francis <[e-mail]>
Reviewed-by: Anup Patel <[e-mail]>
---
 meson.build              |   2 +
 target/riscv/kvm.c       | 133 +++++++++++++++++++++++++++++++++++++++
 target/riscv/meson.build |   1 +
 3 files changed, 136 insertions(+)
 create mode 100644 target/riscv/kvm.c

Comments

Alistair Francis Jan. 10, 2022, 11:09 p.m. UTC | #1

On Mon, Jan 10, 2022 at 11:48 AM Yifei Jiang via <[e-mail]> wrote:
>
> Add target/riscv/kvm.c to place kvm_arch_* function needed by
> kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file.
>
> Signed-off-by: Yifei Jiang <[e-mail]>
> Signed-off-by: Mingwang Li <[e-mail]>
> Reviewed-by: Alistair Francis <[e-mail]>
> Reviewed-by: Anup Patel <[e-mail]>
> ---
>  meson.build              |   2 +
>  target/riscv/kvm.c       | 133 +++++++++++++++++++++++++++++++++++++++
>  target/riscv/meson.build |   1 +
>  3 files changed, 136 insertions(+)
>  create mode 100644 target/riscv/kvm.c
>
> diff --git a/meson.build b/meson.build
> index 53065e96ec..7eaec31a3a 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64']
>    kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
>  elif cpu in ['mips', 'mips64']
>    kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
> +elif cpu in ['riscv']
> +  kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
>  else
>    kvm_targets = []
>  endif

Can you add this as a separate commit at the end of the series?

That way we have implemented KVM support before we enable it for users.

Alistair

Yifei Jiang Jan. 12, 2022, 8:04 a.m. UTC | #2

> -----Original Message-----
> From: Alistair Francis [mailto:[e-mail]]
> Sent: Tuesday, January 11, 2022 7:10 AM
> To: Jiangyifei <[e-mail]>
> Cc: [e-mail] Developers <[e-mail]>; open
> list:RISC-V <[e-mail]>; [e-mail]; open
> list:Overall <[e-mail]>; [e-mail]; Anup Patel
> <[e-mail]>; Palmer Dabbelt <[e-mail]>; Alistair
> Francis <[e-mail]>; Bin Meng <[e-mail]>;
> Fanliang (EulerOS) <[e-mail]>; Wubin (H)
> <[e-mail]>; Wanghaibin (D) <[e-mail]>;
> wanbo (G) <[e-mail]>; limingwang (A)
> <[e-mail]>; Anup Patel <[e-mail]>
> Subject: Re: [PATCH v4 02/12] target/riscv: Add target/riscv/kvm.c to place the
> public kvm interface
> 
> On Mon, Jan 10, 2022 at 11:48 AM Yifei Jiang via <[e-mail]>
> wrote:
> >
> > Add target/riscv/kvm.c to place kvm_arch_* function needed by
> > kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file.
> >
> > Signed-off-by: Yifei Jiang <[e-mail]>
> > Signed-off-by: Mingwang Li <[e-mail]>
> > Reviewed-by: Alistair Francis <[e-mail]>
> > Reviewed-by: Anup Patel <[e-mail]>
> > ---
> >  meson.build              |   2 +
> >  target/riscv/kvm.c       | 133
> +++++++++++++++++++++++++++++++++++++++
> >  target/riscv/meson.build |   1 +
> >  3 files changed, 136 insertions(+)
> >  create mode 100644 target/riscv/kvm.c
> >
> > diff --git a/meson.build b/meson.build index 53065e96ec..7eaec31a3a
> > 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64']
> >    kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']  elif cpu in
> > ['mips', 'mips64']
> >    kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu',
> > 'mips64el-softmmu']
> > +elif cpu in ['riscv']
> > +  kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
> >  else
> >    kvm_targets = []
> >  endif
> 
> Can you add this as a separate commit at the end of the series?
> 
> That way we have implemented KVM support before we enable it for users.
> 
> Alistair

Yes, that makes sense.

Yifei

Patch

diff --git a/meson.build b/meson.build
index 53065e96ec..7eaec31a3a 100644
--- a/meson.build
+++ b/meson.build
@@ -90,6 +90,8 @@  elif cpu in ['ppc', 'ppc64']
   kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
 elif cpu in ['mips', 'mips64']
   kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
+elif cpu in ['riscv']
+  kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
 else
   kvm_targets = []
 endif
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
new file mode 100644
index 0000000000..687dd4b621
--- /dev/null
+++ b/target/riscv/kvm.c
@@ -0,0 +1,133 @@ 
+/*
+ * RISC-V implementation of KVM hooks
+ *
+ * Copyright (c) 2020 Huawei Technologies Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include <sys/ioctl.h>
+
+#include <linux/kvm.h>
+
+#include "qemu-common.h"
+#include "qemu/timer.h"
+#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/kvm.h"
+#include "sysemu/kvm_int.h"
+#include "cpu.h"
+#include "trace.h"
+#include "hw/pci/pci.h"
+#include "exec/memattrs.h"
+#include "exec/address-spaces.h"
+#include "hw/boards.h"
+#include "hw/irq.h"
+#include "qemu/log.h"
+#include "hw/loader.h"
+
+const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
+    KVM_CAP_LAST_INFO
+};
+
+int kvm_arch_get_registers(CPUState *cs)
+{
+    return 0;
+}
+
+int kvm_arch_put_registers(CPUState *cs, int level)
+{
+    return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+    return 0;
+}
+
+int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
+                             uint64_t address, uint32_t data, PCIDevice *dev)
+{
+    return 0;
+}
+
+int kvm_arch_destroy_vcpu(CPUState *cs)
+{
+    return 0;
+}
+
+unsigned long kvm_arch_vcpu_id(CPUState *cpu)
+{
+    return cpu->cpu_index;
+}
+
+void kvm_arch_init_irq_routing(KVMState *s)
+{
+}
+
+int kvm_arch_init_vcpu(CPUState *cs)
+{
+    return 0;
+}
+
+int kvm_arch_msi_data_to_gsi(uint32_t data)
+{
+    abort();
+}
+
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+                                int vector, PCIDevice *dev)
+{
+    return 0;
+}
+
+int kvm_arch_init(MachineState *ms, KVMState *s)
+{
+    return 0;
+}
+
+int kvm_arch_irqchip_create(KVMState *s)
+{
+    return 0;
+}
+
+int kvm_arch_process_async_events(CPUState *cs)
+{
+    return 0;
+}
+
+void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
+{
+}
+
+MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
+{
+    return MEMTXATTRS_UNSPECIFIED;
+}
+
+bool kvm_arch_stop_on_emulation_error(CPUState *cs)
+{
+    return true;
+}
+
+int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
+{
+    return 0;
+}
+
+bool kvm_arch_cpu_check_are_resettable(void)
+{
+    return true;
+}
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
index d5e0bc93ea..2faf08a941 100644
--- a/target/riscv/meson.build
+++ b/target/riscv/meson.build
@@ -19,6 +19,7 @@  riscv_ss.add(files(
   'bitmanip_helper.c',
   'translate.c',
 ))
+riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
 
 riscv_softmmu_ss = ss.source_set()
 riscv_softmmu_ss.add(files(