| Message ID | 20220113114004.286796-21-zhiwei_liu@c-sky.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support UXL filed in xstatus | expand |
On Thu, Jan 13, 2022 at 10:20 PM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote: > > When sew <= 32bits, not need to extend scalar reg. > When sew > 32bits, if xlen is less that sew, we should sign extend > the scalar register, except explicitly specified by the spec. > > Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rvv.c.inc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc > index 1c8086d3a6..b6502cdc7c 100644 > --- a/target/riscv/insn_trans/trans_rvv.c.inc > +++ b/target/riscv/insn_trans/trans_rvv.c.inc > @@ -1201,7 +1201,7 @@ static bool opivx_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, uint32_t vm, > dest = tcg_temp_new_ptr(); > mask = tcg_temp_new_ptr(); > src2 = tcg_temp_new_ptr(); > - src1 = get_gpr(s, rs1, EXT_NONE); > + src1 = get_gpr(s, rs1, EXT_SIGN); > > data = FIELD_DP32(data, VDATA, VM, vm); > data = FIELD_DP32(data, VDATA, LMUL, s->lmul); > -- > 2.25.1 > >
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 1c8086d3a6..b6502cdc7c 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1201,7 +1201,7 @@ static bool opivx_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, uint32_t vm, dest = tcg_temp_new_ptr(); mask = tcg_temp_new_ptr(); src2 = tcg_temp_new_ptr(); - src1 = get_gpr(s, rs1, EXT_NONE); + src1 = get_gpr(s, rs1, EXT_SIGN); data = FIELD_DP32(data, VDATA, VM, vm); data = FIELD_DP32(data, VDATA, LMUL, s->lmul);
When sew <= 32bits, not need to extend scalar reg. When sew > 32bits, if xlen is less that sew, we should sign extend the scalar register, except explicitly specified by the spec. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> --- target/riscv/insn_trans/trans_rvv.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)