| Message ID | 20220113114004.286796-4-zhiwei_liu@c-sky.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support UXL filed in xstatus | expand |
On Thu, Jan 13, 2022 at 9:45 PM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote: > > Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rvi.c.inc | 4 +--- > target/riscv/translate.c | 4 +--- > 2 files changed, 2 insertions(+), 6 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc > index 3a0ae28fef..b9ba57f266 100644 > --- a/target/riscv/insn_trans/trans_rvi.c.inc > +++ b/target/riscv/insn_trans/trans_rvi.c.inc > @@ -68,9 +68,7 @@ static bool trans_jalr(DisasContext *ctx, arg_jalr *a) > tcg_temp_free(t0); > } > > - if (a->rd != 0) { > - tcg_gen_movi_tl(cpu_gpr[a->rd], ctx->pc_succ_insn); > - } > + gen_set_gpri(ctx, a->rd, ctx->pc_succ_insn); > tcg_gen_lookup_and_goto_ptr(); > > if (misaligned) { > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index 615048ec87..b47b308920 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -367,10 +367,8 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) > return; > } > } > - if (rd != 0) { > - tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn); > - } > > + gen_set_gpri(ctx, rd, ctx->pc_succ_insn); > gen_goto_tb(ctx, 0, ctx->base.pc_next + imm); /* must use this for safety */ > ctx->base.is_jmp = DISAS_NORETURN; > } > -- > 2.25.1 > >
diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc index 3a0ae28fef..b9ba57f266 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -68,9 +68,7 @@ static bool trans_jalr(DisasContext *ctx, arg_jalr *a) tcg_temp_free(t0); } - if (a->rd != 0) { - tcg_gen_movi_tl(cpu_gpr[a->rd], ctx->pc_succ_insn); - } + gen_set_gpri(ctx, a->rd, ctx->pc_succ_insn); tcg_gen_lookup_and_goto_ptr(); if (misaligned) { diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 615048ec87..b47b308920 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -367,10 +367,8 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) return; } } - if (rd != 0) { - tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn); - } + gen_set_gpri(ctx, rd, ctx->pc_succ_insn); gen_goto_tb(ctx, 0, ctx->base.pc_next + imm); /* must use this for safety */ ctx->base.is_jmp = DISAS_NORETURN; }
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> --- target/riscv/insn_trans/trans_rvi.c.inc | 4 +--- target/riscv/translate.c | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-)