diff mbox series

[v6,2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE

Message ID 20220125064536.7869-3-liweiwei@iscas.ac.cn (mailing list archive)
State New, archived
Headers show
Series support subsets of virtual memory extension | expand

Commit Message

Weiwei Li Jan. 25, 2022, 6:45 a.m. UTC 
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 target/riscv/cpu_helper.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Alistair Francis Jan. 28, 2022, 5:40 a.m. UTC | #1 
On Tue, Jan 25, 2022 at 5:47 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> Reviewed-by: Anup Patel <anup@brainfault.org>

Could you please add a commit message to this patch?

Alistair

> ---
>  target/riscv/cpu_helper.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 2a921bedfd..a5bf07ccb6 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -641,6 +641,9 @@ restart:
>              return TRANSLATE_FAIL;
>          } else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
>              /* Inner PTE, continue walking */
> +            if (pte & (PTE_D | PTE_A | PTE_U)) {
> +                return TRANSLATE_FAIL;
> +            }
>              base = ppn << PGSHIFT;
>          } else if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
>              /* Reserved leaf PTE flags: PTE_W */
> --
> 2.17.1
>
>
Weiwei Li Jan. 28, 2022, 7:37 a.m. UTC | #2 
在 2022/1/28 下午1:40, Alistair Francis 写道:
> On Tue, Jan 25, 2022 at 5:47 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
>> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
>> Reviewed-by: Anup Patel <anup@brainfault.org>
> Could you please add a commit message to this patch?
>
> Alistair

OK. I'll add it.

Regards,

Weiwei Li

>> ---
>>   target/riscv/cpu_helper.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
>> index 2a921bedfd..a5bf07ccb6 100644
>> --- a/target/riscv/cpu_helper.c
>> +++ b/target/riscv/cpu_helper.c
>> @@ -641,6 +641,9 @@ restart:
>>               return TRANSLATE_FAIL;
>>           } else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
>>               /* Inner PTE, continue walking */
>> +            if (pte & (PTE_D | PTE_A | PTE_U)) {
>> +                return TRANSLATE_FAIL;
>> +            }
>>               base = ppn << PGSHIFT;
>>           } else if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
>>               /* Reserved leaf PTE flags: PTE_W */
>> --
>> 2.17.1
>>
>>
diff mbox series

Patch

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 2a921bedfd..a5bf07ccb6 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -641,6 +641,9 @@  restart:
             return TRANSLATE_FAIL;
         } else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
             /* Inner PTE, continue walking */
+            if (pte & (PTE_D | PTE_A | PTE_U)) {
+                return TRANSLATE_FAIL;
+            }
             base = ppn << PGSHIFT;
         } else if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
             /* Reserved leaf PTE flags: PTE_W */