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[v2,2/6] hw/hppa: Allow up to 16 emulated CPUs

Message ID 20220131213529.17404-3-deller@gmx.de (mailing list archive)
State New, archived
Headers show
Series Fixes and updates for hppa target | expand

Commit Message

Helge Deller Jan. 31, 2022, 9:35 p.m. UTC
This brings the hppa_hardware.h file in sync with the copy in the
SeaBIOS-hppa sources.

In order to support up to 16 CPUs, it's required to move the HPA for
MEMORY_HPA out of the address space of the 16th CPU.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/hppa_hardware.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

--
2.34.1

Comments

Richard Henderson Jan. 31, 2022, 10:05 p.m. UTC | #1
On 2/1/22 08:35, Helge Deller wrote:
> This brings the hppa_hardware.h file in sync with the copy in the
> SeaBIOS-hppa sources.
> 
> In order to support up to 16 CPUs, it's required to move the HPA for
> MEMORY_HPA out of the address space of the 16th CPU.
> 
> Signed-off-by: Helge Deller<deller@gmx.de>
> ---
>   hw/hppa/hppa_hardware.h | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
> index bc258895c9..5edf577563 100644
> --- a/hw/hppa/hppa_hardware.h
> +++ b/hw/hppa/hppa_hardware.h
> @@ -25,7 +25,7 @@
>   #define LASI_GFX_HPA    0xf8000000
>   #define ARTIST_FB_ADDR  0xf9000000
>   #define CPU_HPA         0xfffb0000
> -#define MEMORY_HPA      0xfffbf000
> +#define MEMORY_HPA      0xfffff000

You could mention that you're moving it *well* out of the way, perhaps.  I was first 
confused about why the gap between the two numbers was so large.


> +#define PIM_STORAGE_SIZE 600	/* storage size of pdc_pim_toc_struct (64bit) */

Belongs to the next patch?  Completely unused?

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Helge Deller Feb. 1, 2022, 9:37 a.m. UTC | #2
On 1/31/22 23:05, Richard Henderson wrote:
> On 2/1/22 08:35, Helge Deller wrote:
>> This brings the hppa_hardware.h file in sync with the copy in the
>> SeaBIOS-hppa sources.
>>
>> In order to support up to 16 CPUs, it's required to move the HPA for
>> MEMORY_HPA out of the address space of the 16th CPU.
>>
>> Signed-off-by: Helge Deller<deller@gmx.de>
>> ---
>>   hw/hppa/hppa_hardware.h | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
>> index bc258895c9..5edf577563 100644
>> --- a/hw/hppa/hppa_hardware.h
>> +++ b/hw/hppa/hppa_hardware.h
>> @@ -25,7 +25,7 @@
>>   #define LASI_GFX_HPA    0xf8000000
>>   #define ARTIST_FB_ADDR  0xf9000000
>>   #define CPU_HPA         0xfffb0000
>> -#define MEMORY_HPA      0xfffbf000
>> +#define MEMORY_HPA      0xfffff000
>
> You could mention that you're moving it *well* out of the way,
> perhaps.  I was first confused about why the gap between the two
> numbers was so large.

Yes, I will add that info to the commit message.


>> +#define PIM_STORAGE_SIZE 600    /* storage size of pdc_pim_toc_struct (64bit) */
>
> Belongs to the next patch?  Completely unused?

No, it's used internally in various places inside the SeaBIOS sources (and
is relevant for the TOC/NMI feature).
It's part of this patch, because this patch syncs the SeaBIOS and qemu files
(as stated in the first sentence of this commit message).

> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks!

Helge
diff mbox series

Patch

diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
index bc258895c9..5edf577563 100644
--- a/hw/hppa/hppa_hardware.h
+++ b/hw/hppa/hppa_hardware.h
@@ -25,7 +25,7 @@ 
 #define LASI_GFX_HPA    0xf8000000
 #define ARTIST_FB_ADDR  0xf9000000
 #define CPU_HPA         0xfffb0000
-#define MEMORY_HPA      0xfffbf000
+#define MEMORY_HPA      0xfffff000

 #define PCI_HPA         DINO_HPA        /* PCI bus */
 #define IDE_HPA         0xf9000000      /* Boot disc controller */
@@ -43,9 +43,10 @@ 
 #define PORT_SERIAL1    (DINO_UART_HPA + 0x800)
 #define PORT_SERIAL2    (LASI_UART_HPA + 0x800)

-#define HPPA_MAX_CPUS   8       /* max. number of SMP CPUs */
+#define HPPA_MAX_CPUS   16      /* max. number of SMP CPUs */
 #define CPU_CLOCK_MHZ   250     /* emulate a 250 MHz CPU */

 #define CPU_HPA_CR_REG  7       /* store CPU HPA in cr7 (SeaBIOS internal) */
+#define PIM_STORAGE_SIZE 600	/* storage size of pdc_pim_toc_struct (64bit) */

 #endif