diff mbox series

[v3,2/6] target/riscv: Add the privileged spec version 1.12.0

Message ID 20220206091835.1244296-3-atishp@rivosinc.com (mailing list archive)
State New, archived
Headers show
Series Privilege version update | expand

Commit Message

Atish Kumar Patra Feb. 6, 2022, 9:18 a.m. UTC 
Add the definition for ratified privileged specification version v1.12

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 target/riscv/cpu.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Alistair Francis Feb. 21, 2022, 9:38 p.m. UTC | #1 
On Sun, Feb 6, 2022 at 7:37 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> Add the definition for ratified privileged specification version v1.12
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index e5ff4c134c86..60b847141db2 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -86,6 +86,7 @@ enum {
>  enum {
>      PRIV_VERSION_1_10_0 = 0,
>      PRIV_VERSION_1_11_0,
> +    PRIV_VERSION_1_12_0,
>  };
>
>  #define VEXT_VERSION_1_00_0 0x00010000
> --
> 2.30.2
>
>
diff mbox series

Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index e5ff4c134c86..60b847141db2 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -86,6 +86,7 @@  enum {
 enum {
     PRIV_VERSION_1_10_0 = 0,
     PRIV_VERSION_1_11_0,
+    PRIV_VERSION_1_12_0,
 };
 
 #define VEXT_VERSION_1_00_0 0x00010000