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Wed, 16 Feb 2022 16:25:02 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 67E517806B; Wed, 16 Feb 2022 16:25:01 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.144.50]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 16 Feb 2022 16:25:01 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH v2 15/27] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function Date: Wed, 16 Feb 2022 13:24:14 -0300 Message-Id: <20220216162426.1885923-16-farosas@linux.ibm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220216162426.1885923-1-farosas@linux.ibm.com> References: <20220216162426.1885923-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: xmK7dxsEdPTKolgv9TIvoIRJP1iJzsuN X-Proofpoint-ORIG-GUID: YSdfDbqZIIPYlb3EHctcNuDH3A9uwdbc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-16_07,2022-02-16_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 phishscore=0 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202160095 Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is just to have 755-specific registers contained into a function, intead of leaving them open-coded in init_proc_755. It makes init_proc easier to read and keeps later patches that touch this code a bit cleaner. Signed-off-by: Fabiano Rosas Reviewed-by: David Gibson --- target/ppc/cpu_init.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index ea4ed19bde..d6e19e9cf0 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -503,6 +503,20 @@ static void register_745_sprs(CPUPPCState *env) 0x00000000); } +static void register_755_sprs(CPUPPCState *env) +{ + /* L2 cache control */ + spr_register(env, SPR_L2CR, "L2CR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, spr_access_nop, + 0x00000000); + + spr_register(env, SPR_L2PMCR, "L2PMCR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); +} + /* SPR common to all 7xx PowerPC implementations */ static void register_7xx_sprs(CPUPPCState *env) { @@ -4549,16 +4563,8 @@ static void init_proc_755(CPUPPCState *env) register_sdr1_sprs(env); register_7xx_sprs(env); register_745_sprs(env); - /* L2 cache control */ - spr_register(env, SPR_L2CR, "L2CR", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, spr_access_nop, - 0x00000000); + register_755_sprs(env); - spr_register(env, SPR_L2PMCR, "L2PMCR", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); /* Thermal management */ register_thrm_sprs(env);