| Message ID | 20220217101924.15347-8-shentey@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | malta: Fix PCI IRQ levels to be preserved during migration, cleanup | expand |
On Thu, 17 Feb 2022, Bernhard Beschow wrote: > Now that gt64120_register() lost its pic parameter, there is an > opportunity to remove it. gt64120_register() is old style by wrapping > qdev API, and the new style is to use qdev directly. So take the > opportunity and modernize the code. > > Suggested-by: BALATON Zoltan <balaton@eik.bme.hu> > Signed-off-by: Bernhard Beschow <shentey@gmail.com> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > hw/mips/gt64xxx_pci.c | 21 ++++----------------- > hw/mips/malta.c | 3 ++- > include/hw/mips/mips.h | 3 --- > 3 files changed, 6 insertions(+), 21 deletions(-) > > diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c > index eb205d6d70..e0ff1b5566 100644 > --- a/hw/mips/gt64xxx_pci.c > +++ b/hw/mips/gt64xxx_pci.c > @@ -26,7 +26,6 @@ > #include "qapi/error.h" > #include "qemu/units.h" > #include "qemu/log.h" > -#include "hw/mips/mips.h" > #include "hw/pci/pci.h" > #include "hw/pci/pci_host.h" > #include "migration/vmstate.h" > @@ -1151,30 +1150,18 @@ static void gt64120_reset(DeviceState *dev) > static void gt64120_realize(DeviceState *dev, Error **errp) > { > GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); > + PCIHostState *phb = PCI_HOST_BRIDGE(dev); > > memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, > "gt64120-isd", 0x1000); > -} > - > -PCIBus *gt64120_register(void) > -{ > - GT64120State *d; > - PCIHostState *phb; > - DeviceState *dev; > - > - dev = qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE); > - d = GT64120_PCI_HOST_BRIDGE(dev); > - phb = PCI_HOST_BRIDGE(dev); > - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); > - address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); > + memory_region_init(&s->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); > + address_space_init(&s->pci0_mem_as, &s->pci0_mem, "pci0-mem"); > phb->bus = pci_root_bus_new(dev, "pci", > - &d->pci0_mem, > + &s->pci0_mem, > get_system_io(), > PCI_DEVFN(18, 0), TYPE_PCI_BUS); > - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > > pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); > - return phb->bus; > } > > static void gt64120_pci_realize(PCIDevice *d, Error **errp) > diff --git a/hw/mips/malta.c b/hw/mips/malta.c > index 13254dbc89..55037eb90f 100644 > --- a/hw/mips/malta.c > +++ b/hw/mips/malta.c > @@ -1390,7 +1390,8 @@ void mips_malta_init(MachineState *machine) > stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); > > /* Northbridge */ > - pci_bus = gt64120_register(); > + dev = sysbus_create_simple("gt64120", -1, NULL); > + pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); > /* > * The whole address space decoded by the GT-64120A doesn't generate > * exception when accessing invalid memory. Create an empty slot to > diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h > index ff88942e63..101799f7d3 100644 > --- a/include/hw/mips/mips.h > +++ b/include/hw/mips/mips.h > @@ -9,9 +9,6 @@ > > #include "exec/memory.h" > > -/* gt64xxx.c */ > -PCIBus *gt64120_register(void); > - > /* bonito.c */ > PCIBus *bonito_init(qemu_irq *pic); > >
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index eb205d6d70..e0ff1b5566 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -26,7 +26,6 @@ #include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" -#include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "migration/vmstate.h" @@ -1151,30 +1150,18 @@ static void gt64120_reset(DeviceState *dev) static void gt64120_realize(DeviceState *dev, Error **errp) { GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(dev); memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, "gt64120-isd", 0x1000); -} - -PCIBus *gt64120_register(void) -{ - GT64120State *d; - PCIHostState *phb; - DeviceState *dev; - - dev = qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE); - d = GT64120_PCI_HOST_BRIDGE(dev); - phb = PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); - address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); + memory_region_init(&s->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); + address_space_init(&s->pci0_mem_as, &s->pci0_mem, "pci0-mem"); phb->bus = pci_root_bus_new(dev, "pci", - &d->pci0_mem, + &s->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), TYPE_PCI_BUS); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); - return phb->bus; } static void gt64120_pci_realize(PCIDevice *d, Error **errp) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 13254dbc89..55037eb90f 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1390,7 +1390,8 @@ void mips_malta_init(MachineState *machine) stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); /* Northbridge */ - pci_bus = gt64120_register(); + dev = sysbus_create_simple("gt64120", -1, NULL); + pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); /* * The whole address space decoded by the GT-64120A doesn't generate * exception when accessing invalid memory. Create an empty slot to diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h index ff88942e63..101799f7d3 100644 --- a/include/hw/mips/mips.h +++ b/include/hw/mips/mips.h @@ -9,9 +9,6 @@ #include "exec/memory.h" -/* gt64xxx.c */ -PCIBus *gt64120_register(void); - /* bonito.c */ PCIBus *bonito_init(qemu_irq *pic);