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[201.1.57.208]) by smtp.gmail.com with ESMTPSA id p1-20020a0568301d4100b0060603221270sm2907397oth.64.2022.05.07.12.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 May 2022 12:06:39 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 03/17] ppc/pnv: rename PnvPHB3.dma_spaces to PnvPHB3.v3_dma_spaces Date: Sat, 7 May 2022 16:06:10 -0300 Message-Id: <20220507190624.507419-4-danielhb413@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220507190624.507419-1-danielhb413@gmail.com> References: <20220507190624.507419-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::35; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x35.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The last common attribute that has a different meaning/semantic between PnvPHB3 and PnvPHB4 devices is the 'dma_spaces' QLIST. Rename the PHB3 version to 'v3_dma_spaces'. The reason why we chose that instead of 'dma3_spaces' or similar is to avoid any misunderstanding about this being related to DMA version 3. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb3.c | 10 +++++----- include/hw/pci-host/pnv_phb3.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 77ee2325be..70d92edd94 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -421,7 +421,7 @@ static void pnv_phb3_rtc_invalidate(PnvPHB3 *phb, uint64_t val) PnvPhb3DMASpace *ds; /* Always invalidate all for now ... */ - QLIST_FOREACH(ds, &phb->dma_spaces, list) { + QLIST_FOREACH(ds, &phb->v3_dma_spaces, list) { ds->pe_num = PHB_INVALID_PE; } } @@ -460,7 +460,7 @@ static void pnv_phb3_update_all_msi_regions(PnvPHB3 *phb) { PnvPhb3DMASpace *ds; - QLIST_FOREACH(ds, &phb->dma_spaces, list) { + QLIST_FOREACH(ds, &phb->v3_dma_spaces, list) { pnv_phb3_update_msi_regions(ds); } } @@ -938,7 +938,7 @@ static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn) PnvPHB3 *phb = opaque; PnvPhb3DMASpace *ds; - QLIST_FOREACH(ds, &phb->dma_spaces, list) { + QLIST_FOREACH(ds, &phb->v3_dma_spaces, list) { if (ds->bus == bus && ds->devfn == devfn) { break; } @@ -961,7 +961,7 @@ static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn) ds, "msi64", 0x100000); pnv_phb3_update_msi_regions(ds); - QLIST_INSERT_HEAD(&phb->dma_spaces, ds, list); + QLIST_INSERT_HEAD(&phb->v3_dma_spaces, ds, list); } return &ds->dma_as; } @@ -970,7 +970,7 @@ static void pnv_phb3_instance_init(Object *obj) { PnvPHB3 *phb = PNV_PHB3(obj); - QLIST_INIT(&phb->dma_spaces); + QLIST_INIT(&phb->v3_dma_spaces); /* LSI sources */ object_initialize_child(obj, "lsi", &phb->lsis, TYPE_ICS); diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 486dbbefee..35483e59c3 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -155,7 +155,7 @@ struct PnvPHB3 { PnvPBCQState pbcq; - QLIST_HEAD(, PnvPhb3DMASpace) dma_spaces; + QLIST_HEAD(, PnvPhb3DMASpace) v3_dma_spaces; PnvChip *chip; };