diff mbox series

[02/18] target/arm: Use arm_current_el for simple exceptions

Message ID 20220523204742.740932-3-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/arm: tidy exception routing | expand

Commit Message

Richard Henderson May 23, 2022, 8:47 p.m. UTC 
For these cases, the syndrome does not depend on the
origin or target EL, so we can simply defer selection
of the target EL to raise_exception.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper-a64.c |  5 +++--
 target/arm/helper.c     | 10 +++-------
 target/arm/mte_helper.c |  7 +++----
 target/arm/op_helper.c  | 13 ++++++-------
 4 files changed, 15 insertions(+), 20 deletions(-)

Comments

Peter Maydell May 30, 2022, 12:42 p.m. UTC | #1 
On Mon, 23 May 2022 at 21:49, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> For these cases, the syndrome does not depend on the
> origin or target EL, so we can simply defer selection
> of the target EL to raise_exception.

The commit message says "defer to raise_exception()", but
that would mean passing 0 as the cur_or_target_el, which
mostly these changes aren't doing.

Instead it looks like what we're relying on is that
if arm_current_el() != 0 then exception_target_el() == arm_current_el(),
and if arm_current_el() is 0 then raise_exception() will
call exception_target_el() for us. Which is true, but not
really what the commit message is saying.

-- PMM
diff mbox series

Patch

diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 77a8502b6b..22db213aab 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -70,12 +70,13 @@  static void daif_check(CPUARMState *env, uint32_t op,
                        uint32_t imm, uintptr_t ra)
 {
     /* DAIF update to PSTATE. This is OK from EL0 only if UMA is set.  */
-    if (arm_current_el(env) == 0 && !(arm_sctlr(env, 0) & SCTLR_UMA)) {
+    int el = arm_current_el(env);
+    if (el == 0 && !(arm_sctlr(env, 0) & SCTLR_UMA)) {
         raise_exception_ra(env, EXCP_UDEF,
                            syn_aa64_sysregtrap(0, extract32(op, 0, 3),
                                                extract32(op, 3, 3), 4,
                                                imm, 0x1f, 0),
-                           exception_target_el(env), ra);
+                           el, ra);
     }
 }
 
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 40da63913c..e0be96b988 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3232,14 +3232,10 @@  static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
              * Synchronous external aborts during a translation table walk
              * are taken as Data Abort exceptions.
              */
-            if (fi.stage2) {
-                if (current_el == 3) {
-                    target_el = 3;
-                } else {
-                    target_el = 2;
-                }
+            if (fi.stage2 && current_el < 2) {
+                target_el = 2;
             } else {
-                target_el = exception_target_el(env);
+                target_el = current_el;
             }
             take_exc = true;
         }
diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c
index d11a8c70d0..98f2a3215d 100644
--- a/target/arm/mte_helper.c
+++ b/target/arm/mte_helper.c
@@ -540,14 +540,13 @@  void HELPER(stzgm_tags)(CPUARMState *env, uint64_t ptr, uint64_t val)
 static void mte_sync_check_fail(CPUARMState *env, uint32_t desc,
                                 uint64_t dirty_ptr, uintptr_t ra)
 {
-    int is_write, syn;
+    int is_write, syn, el = arm_current_el(env);
 
     env->exception.vaddress = dirty_ptr;
 
     is_write = FIELD_EX32(desc, MTEDESC, WRITE);
-    syn = syn_data_abort_no_iss(arm_current_el(env) != 0, 0, 0, 0, 0, is_write,
-                                0x11);
-    raise_exception_ra(env, EXCP_DATA_ABORT, syn, exception_target_el(env), ra);
+    syn = syn_data_abort_no_iss(el != 0, 0, 0, 0, 0, is_write, 0x11);
+    raise_exception_ra(env, EXCP_DATA_ABORT, syn, el, ra);
     g_assert_not_reached();
 }
 
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 6b9141b79a..61e9c1d903 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -503,7 +503,7 @@  uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
          * Other UNPREDICTABLE and UNDEF cases were caught at translate time.
          */
         raise_exception(env, EXCP_UDEF, syn_uncategorized(),
-                        exception_target_el(env));
+                        arm_current_el(env));
     }
 
     if ((env->uncached_cpsr & CPSR_M) == mode) {
@@ -567,8 +567,7 @@  static void msr_mrs_banked_exc_checks(CPUARMState *env, uint32_t tgtmode,
     return;
 
 undef:
-    raise_exception(env, EXCP_UDEF, syn_uncategorized(),
-                    exception_target_el(env));
+    raise_exception(env, EXCP_UDEF, syn_uncategorized(), arm_current_el(env));
 }
 
 void HELPER(msr_banked)(CPUARMState *env, uint32_t value, uint32_t tgtmode,
@@ -697,7 +696,7 @@  void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome,
     target_el = res & CP_ACCESS_EL_MASK;
     switch (target_el) {
     case 0:
-        target_el = exception_target_el(env);
+        target_el = arm_current_el(env);
         break;
     case 2:
         assert(arm_current_el(env) != 3);
@@ -808,7 +807,7 @@  void HELPER(pre_hvc)(CPUARMState *env)
 
     if (undef) {
         raise_exception(env, EXCP_UDEF, syn_uncategorized(),
-                        exception_target_el(env));
+                        arm_current_el(env));
     }
 }
 
@@ -870,7 +869,7 @@  void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
          * This handles the very last line of the previous table.
          */
         raise_exception(env, EXCP_UDEF, syn_uncategorized(),
-                        exception_target_el(env));
+                        arm_current_el(env));
     }
 
     if (cur_el == 1 && (arm_hcr_el2_eff(env) & HCR_TSC)) {
@@ -889,7 +888,7 @@  void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
     if (!arm_is_psci_call(cpu, EXCP_SMC) &&
         (smd || !arm_feature(env, ARM_FEATURE_EL3))) {
         raise_exception(env, EXCP_UDEF, syn_uncategorized(),
-                        exception_target_el(env));
+                        arm_current_el(env));
     }
 }