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[217.237.121.196]) by smtp.gmail.com with ESMTPSA id f25-20020a170906139900b006fe8c831632sm3066160ejc.73.2022.06.03.11.51.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jun 2022 11:51:02 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Marcel Apfelbaum , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , =?utf-8?q?Herv=C3=A9_Poussineau?= , Paolo Bonzini , Bernhard Beschow , Mark Cave-Ayland Subject: [PATCH v4 01/11] hw/southbridge/piix: Aggregate all PIIX southbridge type names Date: Fri, 3 Jun 2022 20:50:35 +0200 Message-Id: <20220603185045.143789-2-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220603185045.143789-1-shentey@gmail.com> References: <20220603185045.143789-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=shentey@gmail.com; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" TYPE_PIIX3_PCI_DEVICE resides there as already, so add the remaining ones, too. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- hw/isa/piix3.c | 3 --- include/hw/isa/isa.h | 2 -- include/hw/southbridge/piix.h | 4 ++++ 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index dab901c9ad..d96ce2b788 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -35,9 +35,6 @@ #define XEN_PIIX_NUM_PIRQS 128ULL -#define TYPE_PIIX3_DEVICE "PIIX3" -#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" - static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) { qemu_set_irq(piix3->pic[pic_irq], diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 034d706ba1..e9fa2f5cea 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -144,6 +144,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d) return ISA_BUS(qdev_get_parent_bus(DEVICE(d))); } -#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" - #endif diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 976b4da582..3b97186f75 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -64,6 +64,10 @@ typedef struct PIIXState PIIX3State; DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, TYPE_PIIX3_PCI_DEVICE) +#define TYPE_PIIX3_DEVICE "PIIX3" +#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" +#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" + PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);