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[94.228.4.124]) by smtp.gmail.com with ESMTPSA id az21-20020a05600c601500b0039c871d3191sm1103006wmb.3.2022.06.11.03.35.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 11 Jun 2022 03:35:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Aurelien Jarno , Stefan Pejic , Aleksandar Rikalo , Jiaxun Yang , =?utf-8?q?Herv=C3=A9_Poussineau?= , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PULL 26/49] hw/acpi/piix4: remove unused piix4_pm_initfn() function Date: Sat, 11 Jun 2022 12:32:49 +0200 Message-Id: <20220611103312.67773-27-philippe.mathieu.daude@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220611103312.67773-1-philippe.mathieu.daude@gmail.com> References: <20220611103312.67773-1-philippe.mathieu.daude@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Mark Cave-Ayland This function is now unused and so can be completely removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220528091934.15520-13-mark.cave-ayland@ilande.co.uk> Reviewed-by: Bernhard Beschow Signed-off-by: Philippe Mathieu-Daudé --- hw/acpi/piix4.c | 19 ------------------- include/hw/southbridge/piix.h | 4 ---- 2 files changed, 23 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 32033bc9d7..0a81f1ad93 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -505,25 +505,6 @@ static void piix4_pm_init(Object *obj) qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1); } -PIIX4PMState *piix4_pm_initfn(PCIBus *bus, int devfn, uint32_t smb_io_base, - bool smm_enabled) -{ - PCIDevice *pci_dev; - DeviceState *dev; - PIIX4PMState *s; - - pci_dev = pci_new(devfn, TYPE_PIIX4_PM); - dev = DEVICE(pci_dev); - qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base); - qdev_prop_set_bit(dev, "smm-enabled", smm_enabled); - - s = PIIX4_PM(dev); - - pci_realize_and_unref(pci_dev, bus, &error_fatal); - - return s; -} - static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) { PIIX4PMState *s = opaque; diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index b69e0dfb04..976b4da582 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -14,10 +14,6 @@ #include "hw/pci/pci.h" #include "qom/object.h" -#include "hw/acpi/piix4.h" - -PIIX4PMState *piix4_pm_initfn(PCIBus *bus, int devfn, uint32_t smb_io_base, - bool smm_enabled); /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60