From patchwork Fri Jul 1 16:10:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joao Martins X-Patchwork-Id: 12903562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9D1AC43334 for ; Fri, 1 Jul 2022 16:18:24 +0000 (UTC) Received: from localhost ([::1]:54220 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o7JLb-0001mO-Ka for qemu-devel@archiver.kernel.org; Fri, 01 Jul 2022 12:18:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46852) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o7JEV-00008a-P6 for qemu-devel@nongnu.org; Fri, 01 Jul 2022 12:11:03 -0400 Received: from mx0a-00069f02.pphosted.com ([205.220.165.32]:43748) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o7JET-0002Kc-GM for qemu-devel@nongnu.org; Fri, 01 Jul 2022 12:11:03 -0400 Received: from pps.filterd (m0246617.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 261G3Nf8021098; Fri, 1 Jul 2022 16:10:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2021-07-09; bh=z+z27MuS4laK8hOrevo85qcYt+7RV4yIWeCTw+GvVWs=; b=cOBns+OfnbpwTNvegSF1XHptZp/1tOdviTms7Tfl5GZuaoB8HciO8NgANBjcpJcIPhe9 AblEw/FmlTMovZtUYlTydBKQp27Csfpiu3Js8K0vv7IXcVZGb814fZcNizzWXNuOjnnm xkEQLG9cp4c4a95DP3AC/HZ2s3efQQgkHKbSmoF8yfQmC8j7FE3bEJLEV/oa27VKuMcS 6JIqmOqEiLuW0b4pg2Y67vF/citVHYxW8mMEKFc1+vQmVOVDGzzBN/IE1jzS17wivTPs aH2BRYlEGlG1Jw2xLXSUY1q25Bb/77Bj3+usWMVhu9QSm6INXt9+xLHLKN1u7yAqTb7T MA== Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.appoci.oracle.com [138.1.37.129]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 3gwtwufrar-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 01 Jul 2022 16:10:54 +0000 Received: from pps.filterd (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (8.16.1.2/8.16.1.2) with SMTP id 261G5iZV016187; Fri, 1 Jul 2022 16:10:53 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com with ESMTP id 3gwrt4sw1x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 01 Jul 2022 16:10:53 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 261GAftI029065; Fri, 1 Jul 2022 16:10:53 GMT Received: from paddy.uk.oracle.com (dhcp-10-175-184-247.vpn.oracle.com [10.175.184.247]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com with ESMTP id 3gwrt4svtm-4; Fri, 01 Jul 2022 16:10:52 +0000 From: Joao Martins To: qemu-devel@nongnu.org Cc: Igor Mammedov , Eduardo Habkost , "Michael S. Tsirkin" , Richard Henderson , Alex Williamson , Paolo Bonzini , Ani Sinha , Marcel Apfelbaum , "Dr. David Alan Gilbert" , Suravee Suthikulpanit , Joao Martins Subject: [PATCH v6 03/10] i386/pc: pass pci_hole64_size to pc_memory_init() Date: Fri, 1 Jul 2022 17:10:07 +0100 Message-Id: <20220701161014.3850-4-joao.m.martins@oracle.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20220701161014.3850-1-joao.m.martins@oracle.com> References: <20220701161014.3850-1-joao.m.martins@oracle.com> X-Proofpoint-ORIG-GUID: KDj-HXEl_O1D9bWrRCMDZfLN9_xF2_4v X-Proofpoint-GUID: KDj-HXEl_O1D9bWrRCMDZfLN9_xF2_4v Received-SPF: pass client-ip=205.220.165.32; envelope-from=joao.m.martins@oracle.com; helo=mx0a-00069f02.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the pre-initialized pci-host qdev and fetch the pci-hole64-size into pc_memory_init() newly added argument. piix needs a bit of care given all the !pci_enabled() and that the pci_hole64_size is private to i440fx. This is in preparation to determine that host-phys-bits are enough and for pci-hole64-size to be considered to relocate ram-above-4g to be at 1T (on AMD platforms). Signed-off-by: Joao Martins Reviewed-by: Igor Mammedov --- hw/i386/pc.c | 3 ++- hw/i386/pc_piix.c | 5 ++++- hw/i386/pc_q35.c | 8 +++++++- hw/pci-host/i440fx.c | 7 +++++++ include/hw/i386/pc.h | 3 ++- include/hw/pci-host/i440fx.h | 1 + 6 files changed, 23 insertions(+), 4 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a9d1bf95649a..1bb89a9c17ec 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -817,7 +817,8 @@ void xen_load_linux(PCMachineState *pcms) void pc_memory_init(PCMachineState *pcms, MemoryRegion *system_memory, MemoryRegion *rom_memory, - MemoryRegion **ram_memory) + MemoryRegion **ram_memory, + uint64_t pci_hole64_size) { int linux_boot, i; MemoryRegion *option_rom_mr; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6186a1473755..f3c726e42400 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -91,6 +91,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *pci_memory; MemoryRegion *rom_memory; ram_addr_t lowmem; + uint64_t hole64_size; DeviceState *i440fx_host; /* @@ -166,10 +167,12 @@ static void pc_init1(MachineState *machine, memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; i440fx_host = qdev_new(host_type); + hole64_size = i440fx_pci_hole64_size(i440fx_host); } else { pci_memory = NULL; rom_memory = system_memory; i440fx_host = NULL; + hole64_size = 0; } pc_guest_info_init(pcms); @@ -186,7 +189,7 @@ static void pc_init1(MachineState *machine, /* allocate ram and load rom/bios */ if (!xen_enabled()) { pc_memory_init(pcms, system_memory, - rom_memory, &ram_memory); + rom_memory, &ram_memory, hole64_size); } else { pc_system_flash_cleanup_unused(pcms); if (machine->kernel_filename != NULL) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 46ea89e564de..5a4a737fe203 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -138,6 +138,7 @@ static void pc_q35_init(MachineState *machine) MachineClass *mc = MACHINE_GET_CLASS(machine); bool acpi_pcihp; bool keep_pci_slot_hpc; + uint64_t pci_hole64_size = 0; /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping @@ -206,8 +207,13 @@ static void pc_q35_init(MachineState *machine) /* create pci host bus */ q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); + if (pcmc->pci_enabled) { + pci_hole64_size = q35_host->mch.pci_hole64_size; + } + /* allocate ram and load rom/bios */ - pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory); + pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory, + pci_hole64_size); object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)); object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM, diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index d5426ef4a53c..15680da7d709 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -237,6 +237,13 @@ static void i440fx_realize(PCIDevice *dev, Error **errp) } } +uint64_t i440fx_pci_hole64_size(DeviceState *i440fx_dev) +{ + I440FXState *i440fx = I440FX_PCI_HOST_BRIDGE(i440fx_dev); + + return i440fx->pci_hole64_size; +} + PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b7735dccfc81..568c226d3034 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -159,7 +159,8 @@ void xen_load_linux(PCMachineState *pcms); void pc_memory_init(PCMachineState *pcms, MemoryRegion *system_memory, MemoryRegion *rom_memory, - MemoryRegion **ram_memory); + MemoryRegion **ram_memory, + uint64_t pci_hole64_size); uint64_t pc_pci_hole64_start(void); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); void pc_basic_device_init(struct PCMachineState *pcms, diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index d02bf1ed6b93..2234dd5a2a6a 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -45,5 +45,6 @@ PCIBus *i440fx_init(const char *pci_type, MemoryRegion *pci_memory, MemoryRegion *ram_memory); +uint64_t i440fx_pci_hole64_size(DeviceState *i440fx_dev); #endif