| Message ID | 20220708073943.54781-1-kito.cheng@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] target/riscv: Lower bound of VLEN is 32, and check VLEN >= ELEN | expand |
在 2022/7/8 下午3:39, Kito Cheng 写道: > According RVV spec 1.0, the minmal requirement of VLEN is great than or > equal to ELEN, and minmal possible ELEN is 32, and also spec has mention > `Minimum VLEN` for zve32* is 32, so the lower bound of VLEN is 32 I > think. Sorry. I have a question about how to decide the minmal possible ELEN to be 32? In current implementation, elen should be in the range [8, 64](and there seems to be a typo in the check for this). If the minmal possible ELEN is 32, maybe we need change the check to "elen >= 32" too. Regards, Weiwei Li > [1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters > [2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#182-zve-vector-extensions-for-embedded-processors > > Signed-off-by: Kito Cheng <kito.cheng@sifive.com> > --- > target/riscv/cpu.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 1bb3973806..487d0faa63 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -740,10 +740,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > "Vector extension VLEN must be power of 2"); > return; > } > - if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { > + if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 32) { > error_setg(errp, > "Vector extension implementation only supports VLEN " > - "in the range [128, %d]", RV_VLEN_MAX); > + "in the range [32, %d]", RV_VLEN_MAX); > return; > } > if (!is_power_of_2(cpu->cfg.elen)) { > @@ -757,6 +757,12 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > "in the range [8, 64]"); > return; > } > + if (cpu->cfg.vlen < cpu->cfg.elen) { > + error_setg(errp, > + "Vector extension VLEN must be greater than or equal " > + "to ELEN"); > + return; > + } > if (cpu->cfg.vext_spec) { > if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { > vext_version = VEXT_VERSION_1_00_0;
在 2022/7/8 下午3:39, Kito Cheng 写道: > According RVV spec 1.0, the minmal requirement of VLEN is great than or > equal to ELEN, and minmal possible ELEN is 32, and also spec has mention > `Minimum VLEN` for zve32* is 32, so the lower bound of VLEN is 32 I > think. > > [1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters > [2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#182-zve-vector-extensions-for-embedded-processors > > Signed-off-by: Kito Cheng <kito.cheng@sifive.com> > --- > target/riscv/cpu.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 1bb3973806..487d0faa63 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -740,10 +740,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > "Vector extension VLEN must be power of 2"); > return; > } > - if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { > + if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 32) { > error_setg(errp, > "Vector extension implementation only supports VLEN " > - "in the range [128, %d]", RV_VLEN_MAX); > + "in the range [32, %d]", RV_VLEN_MAX); > return; > } The check for "VLEN in the range [128, RV_VLEN_MAX]" seems right here, since this check is for V vector extension in current implementation and "The V vector extension requires Zvl128b"(in section 18.3). Regards, Weiwei Li > if (!is_power_of_2(cpu->cfg.elen)) { > @@ -757,6 +757,12 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > "in the range [8, 64]"); > return; > } > + if (cpu->cfg.vlen < cpu->cfg.elen) { > + error_setg(errp, > + "Vector extension VLEN must be greater than or equal " > + "to ELEN"); > + return; > + } > if (cpu->cfg.vext_spec) { > if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { > vext_version = VEXT_VERSION_1_00_0;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1bb3973806..487d0faa63 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -740,10 +740,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "Vector extension VLEN must be power of 2"); return; } - if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { + if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 32) { error_setg(errp, "Vector extension implementation only supports VLEN " - "in the range [128, %d]", RV_VLEN_MAX); + "in the range [32, %d]", RV_VLEN_MAX); return; } if (!is_power_of_2(cpu->cfg.elen)) { @@ -757,6 +757,12 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "in the range [8, 64]"); return; } + if (cpu->cfg.vlen < cpu->cfg.elen) { + error_setg(errp, + "Vector extension VLEN must be greater than or equal " + "to ELEN"); + return; + } if (cpu->cfg.vext_spec) { if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { vext_version = VEXT_VERSION_1_00_0;
According RVV spec 1.0, the minmal requirement of VLEN is great than or equal to ELEN, and minmal possible ELEN is 32, and also spec has mention `Minimum VLEN` for zve32* is 32, so the lower bound of VLEN is 32 I think. [1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters [2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#182-zve-vector-extensions-for-embedded-processors Signed-off-by: Kito Cheng <kito.cheng@sifive.com> --- target/riscv/cpu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)