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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id l17-20020a170903121100b0016bef50c1ebsm8122412plh.128.2022.07.08.00.39.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 00:39:47 -0700 (PDT) From: Kito Cheng To: alistair.francis@wdc.com, palmer@dabbelt.com, frank.chang@sifive.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org, liweiwei@iscas.ac.cn Cc: Kito Cheng Subject: [PATCH 1/2] target/riscv: Lower bound of VLEN is 32, and check VLEN >= ELEN Date: Fri, 8 Jul 2022 15:39:42 +0800 Message-Id: <20220708073943.54781-1-kito.cheng@sifive.com> X-Mailer: git-send-email 2.34.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=kito.cheng@sifive.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" According RVV spec 1.0, the minmal requirement of VLEN is great than or equal to ELEN, and minmal possible ELEN is 32, and also spec has mention `Minimum VLEN` for zve32* is 32, so the lower bound of VLEN is 32 I think. [1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters [2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#182-zve-vector-extensions-for-embedded-processors Signed-off-by: Kito Cheng --- target/riscv/cpu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1bb3973806..487d0faa63 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -740,10 +740,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "Vector extension VLEN must be power of 2"); return; } - if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { + if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 32) { error_setg(errp, "Vector extension implementation only supports VLEN " - "in the range [128, %d]", RV_VLEN_MAX); + "in the range [32, %d]", RV_VLEN_MAX); return; } if (!is_power_of_2(cpu->cfg.elen)) { @@ -757,6 +757,12 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "in the range [8, 64]"); return; } + if (cpu->cfg.vlen < cpu->cfg.elen) { + error_setg(errp, + "Vector extension VLEN must be greater than or equal " + "to ELEN"); + return; + } if (cpu->cfg.vext_spec) { if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { vext_version = VEXT_VERSION_1_00_0;