From patchwork Tue Jul 12 20:53:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12915693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6816C433EF for ; Tue, 12 Jul 2022 21:04:54 +0000 (UTC) Received: from localhost ([::1]:56986 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBN3t-0002jH-M3 for qemu-devel@archiver.kernel.org; Tue, 12 Jul 2022 17:04:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57950) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBMti-00062a-Nc for qemu-devel@nongnu.org; Tue, 12 Jul 2022 16:54:25 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:33529) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oBMtY-0007Bx-4U for qemu-devel@nongnu.org; Tue, 12 Jul 2022 16:54:22 -0400 Received: by mail-wr1-x433.google.com with SMTP id h17so12875487wrx.0 for ; Tue, 12 Jul 2022 13:54:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9yYFdIlyDjp/T5kAByU4Pq0kNQi/e1CAH5ddJew33Nw=; b=WkrruTIBUSUTcXBuFGcgqs8X8liSjDmTLlEGj6S5irRvp5sCnu3qHJ4DrUKsMoPrfC p0LNrex4s7G5A12Aw7L/lsLZ2vxKdhIiCgF4xzdDn72KqTpAKRgPRQSwjUsZqAtrhRoa JqlvAtF9jrXiSLWdCOgrVXHCjNDI80jM+jpjVEfBikaOMyUeho/K3F9D3k8eemkvfGmZ r9hwIBspAFwH5iEJk3idN3BA0mLVSH8XuXW4wDALHYCLnu4EW/AD9sdL4wUKiRtae9nM 8tvYFb/UF2Ysyq0/8xwIhJAPWKYHc0emt7WFf7XdoyN3LBkfh0SWcQ3gOs7x1VWIgdoi zmXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9yYFdIlyDjp/T5kAByU4Pq0kNQi/e1CAH5ddJew33Nw=; b=onR8spUVHjqASQEuQbLssCaxHetRcQHof0L00K0Ngq1ZDKZcWSTI5EHwvUrEpfBnzG +2I2dlcLBD8xg1eFyg9vc72PjZp3paF1EhAMT4214i17wGT/FI4SXUqTHfEXGklS+hFG 6jEt9TZM6VPSEbTyQUTC9IXWhL1iIJcuDaN9Xz2wDq2jzsanku26LDs7qzyKgen//taX MVNjVVncI2/nyO4APxI5hr9ArL0WzZBLKuFNv3uTFe3v4EGTFMrfA8C8pBSQ3R9aZL0A T+Jt5SxyNln7AXCR/L+Ju+3NRT+Zndj8k/TbxeXm7VQpzM1axKurvAekk+IGMFhwgvTT 3MHQ== X-Gm-Message-State: AJIora84S7fl4I4LuzJCZRXDUhUYP+i/vg2CtaI5w/Lq2RqU6tQjQSLx +hpwqCDmKdgyfG5y/1pDxuElcR8+lK+aPGbM X-Google-Smtp-Source: AGRyM1uUqg0RPHttI4zXGNMqQCVwgyW1gJcUO5VtbTSBjMUOGIvTxt4rqbswU6L32G/gcjAIysDNmQ== X-Received: by 2002:a5d:4310:0:b0:21a:26a5:69b with SMTP id h16-20020a5d4310000000b0021a26a5069bmr23224312wrq.269.1657659251164; Tue, 12 Jul 2022 13:54:11 -0700 (PDT) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id m64-20020a1c2643000000b003a2e87549f6sm46121wmm.21.2022.07.12.13.54.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Jul 2022 13:54:10 -0700 (PDT) To: qemu-devel@nongnu.org Cc: Aurelien Jarno , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Alex_Benn=C3=A9e?= , Aleksandar Rikalo , Pavel Dovgalyuk , Pavel Dovgalyuk Subject: [PULL 04/12] target/mips: introduce Cavium Octeon CPU model Date: Tue, 12 Jul 2022 22:53:39 +0200 Message-Id: <20220712205347.58372-5-f4bug@amsat.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220712205347.58372-1-f4bug@amsat.org> References: <20220712205347.58372-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Original-From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= via From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: Pavel Dovgalyuk This patch adds Cavium Octeon 68XX vCPU which provides Octeon-specific instructions. Signed-off-by: Pavel Dovgalyuk Message-Id: <165572673785.167724.7604881144978983510.stgit@pasha-ThinkPad-X280> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu-defs.c.inc | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 582f940070..7f53c94ec8 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -921,6 +921,34 @@ const mips_def_t mips_defs[] = .insn_flags = CPU_MIPS64R2 | ASE_DSP | ASE_DSP_R2, .mmu_type = MMU_TYPE_R4000, }, + { + /* + * Octeon 68xx with MIPS64 Cavium Octeon features. + */ + .name = "Octeon68XX", + .CP0_PRid = 0x000D9100, + .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | (0x2 << CP0C0_AT) | + (MMU_TYPE_R4000 << CP0C0_MT), + .CP0_Config1 = MIPS_CONFIG1 | (0x3F << CP0C1_MMU) | + (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA) | + (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) | + (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP), + .CP0_Config2 = MIPS_CONFIG2, + .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA) | (1 << CP0C3_DSPP) , + .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | + (0x3c << CP0C4_KScrExist) | (1U << CP0C4_MMUExtDef) | + (3U << CP0C4_MMUSizeExt), + .CP0_LLAddr_rw_bitmask = 0, + .CP0_LLAddr_shift = 4, + .CP0_PageGrain = (1 << CP0PG_ELPA), + .SYNCI_Step = 32, + .CCRes = 2, + .CP0_Status_rw_bitmask = 0x12F8FFFF, + .SEGBITS = 42, + .PABITS = 49, + .insn_flags = CPU_MIPS64R2 | INSN_OCTEON | ASE_DSP, + .mmu_type = MMU_TYPE_R4000, + }, #endif };