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[77.183.210.47]) by smtp.gmail.com with ESMTPSA id w13-20020aa7dccd000000b00435a62d35b5sm7483431edu.45.2022.07.13.01.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 01:18:19 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Eduardo Habkost , Paolo Bonzini , Marcel Apfelbaum , Richard Henderson , =?utf-8?q?Herv=C3=A9_Pous?= =?utf-8?q?sineau?= , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Bernhard Beschow Subject: [PATCH 10/11] hw/isa/piix3: Wire up ACPI interrupt internally Date: Wed, 13 Jul 2022 10:17:34 +0200 Message-Id: <20220713081735.112016-11-shentey@gmail.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220713081735.112016-1-shentey@gmail.com> References: <20220713081735.112016-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=shentey@gmail.com; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now that PIIX3 has the PIC integrated, the ACPI controller can be wired up internally. Signed-off-by: Bernhard Beschow --- hw/i386/pc_piix.c | 1 - hw/isa/piix3.c | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f843a73d90..19c86b68bd 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -303,7 +303,6 @@ static void pc_init1(MachineState *machine, if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); /* TODO: Populate SPD eeprom data. */ diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index fd9c8f853a..56a741c192 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -351,6 +351,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) { return; } + qdev_connect_gpio_out(DEVICE(&d->pm), 0, + qdev_get_gpio_in(DEVICE(&d->pic), 9)); } else { object_unparent(OBJECT(&d->pm)); }