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[6/7] pci: designware: correct host's class_id

Message ID 20220713165449.37433-7-ben.dooks@sifive.com (mailing list archive)
State New, archived
Headers show
Series [1/7] pci: designware: add 64-bit viewport limit | expand

Commit Message

Ben Dooks July 13, 2022, 4:54 p.m. UTC 
This is a host to pcie bridge, so use PCI_CLASS_BRIDGE_HOST
for the class.

Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
---
 hw/pci-host/designware.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index b5d5b2b8a5..a47ae48071 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -615,7 +615,7 @@  static void designware_pcie_root_class_init(ObjectClass *klass, void *data)
     k->vendor_id = PCI_VENDOR_ID_SYNOPSYS;
     k->device_id = 0xABCD;
     k->revision = 0;
-    k->class_id = PCI_CLASS_BRIDGE_PCI;
+    k->class_id = PCI_CLASS_BRIDGE_HOST;
     k->is_bridge = true;
     k->exit = pci_bridge_exitfn;
     k->realize = designware_pcie_root_realize;