Message ID | 20220718230320.24444-3-tsimpson@quicinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Hexagon bug fixes and test improvements | expand |
On 7/18/22 16:03, Taylor Simpson wrote: > The increment used in :brev tests was causing unaligned addresses > Change the increment and the relevant expected values > > Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> > --- > tests/tcg/hexagon/load_unpack.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) Acked-by: Richard Henderson <richard.henderson@linaro.org> r~ > > diff --git a/tests/tcg/hexagon/load_unpack.c b/tests/tcg/hexagon/load_unpack.c > index 3575a37a28..4aa26fc388 100644 > --- a/tests/tcg/hexagon/load_unpack.c > +++ b/tests/tcg/hexagon/load_unpack.c > @@ -245,7 +245,7 @@ TEST_pr(loadbsw4_pr, long long, S, 4, 0x0000ff000000ff00LL, > */ > #define BxW_LOAD_pbr(SZ, RES, PTR) \ > __asm__( \ > - "r4 = #(1 << (16 - 3))\n\t" \ > + "r4 = #(1 << (16 - 4))\n\t" \ > "m0 = r4\n\t" \ > "%0 = mem" #SZ "(%1++m0:brev)\n\t" \ > : "=r"(RES), "+r"(PTR) \ > @@ -273,15 +273,15 @@ void test_##NAME(void) \ > } > > TEST_pbr(loadbzw2_pbr, int, Z, 0x00000000, > - 0x00020081, 0x00060085, 0x00040083, 0x00080087) > + 0x00020081, 0x000a0089, 0x00060085, 0x000e008d) > TEST_pbr(loadbsw2_pbr, int, S, 0x0000ff00, > - 0x00020081, 0x00060085, 0x00040083, 0x00080087) > + 0x00020081, 0x000aff89, 0x0006ff85, 0x000eff8d) > TEST_pbr(loadbzw4_pbr, long long, Z, 0x0000000000000000LL, > - 0x0004008300020081LL, 0x0008008700060085LL, > - 0x0006008500040083LL, 0x000a008900080087LL) > + 0x0004008300020081LL, 0x000c008b000a0089LL, > + 0x0008008700060085LL, 0x0010008f000e008dLL) > TEST_pbr(loadbsw4_pbr, long long, S, 0x0000ff000000ff00LL, > - 0x0004008300020081LL, 0x0008008700060085LL, > - 0x0006008500040083LL, 0x000a008900080087LL) > + 0x0004008300020081LL, 0x000cff8b000aff89LL, > + 0x0008ff870006ff85LL, 0x0010ff8f000eff8dLL) > > /* > ****************************************************************************
diff --git a/tests/tcg/hexagon/load_unpack.c b/tests/tcg/hexagon/load_unpack.c index 3575a37a28..4aa26fc388 100644 --- a/tests/tcg/hexagon/load_unpack.c +++ b/tests/tcg/hexagon/load_unpack.c @@ -245,7 +245,7 @@ TEST_pr(loadbsw4_pr, long long, S, 4, 0x0000ff000000ff00LL, */ #define BxW_LOAD_pbr(SZ, RES, PTR) \ __asm__( \ - "r4 = #(1 << (16 - 3))\n\t" \ + "r4 = #(1 << (16 - 4))\n\t" \ "m0 = r4\n\t" \ "%0 = mem" #SZ "(%1++m0:brev)\n\t" \ : "=r"(RES), "+r"(PTR) \ @@ -273,15 +273,15 @@ void test_##NAME(void) \ } TEST_pbr(loadbzw2_pbr, int, Z, 0x00000000, - 0x00020081, 0x00060085, 0x00040083, 0x00080087) + 0x00020081, 0x000a0089, 0x00060085, 0x000e008d) TEST_pbr(loadbsw2_pbr, int, S, 0x0000ff00, - 0x00020081, 0x00060085, 0x00040083, 0x00080087) + 0x00020081, 0x000aff89, 0x0006ff85, 0x000eff8d) TEST_pbr(loadbzw4_pbr, long long, Z, 0x0000000000000000LL, - 0x0004008300020081LL, 0x0008008700060085LL, - 0x0006008500040083LL, 0x000a008900080087LL) + 0x0004008300020081LL, 0x000c008b000a0089LL, + 0x0008008700060085LL, 0x0010008f000e008dLL) TEST_pbr(loadbsw4_pbr, long long, S, 0x0000ff000000ff00LL, - 0x0004008300020081LL, 0x0008008700060085LL, - 0x0006008500040083LL, 0x000a008900080087LL) + 0x0004008300020081LL, 0x000cff8b000aff89LL, + 0x0008ff870006ff85LL, 0x0010ff8f000eff8dLL) /* ****************************************************************************
The increment used in :brev tests was causing unaligned addresses Change the increment and the relevant expected values Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> --- tests/tcg/hexagon/load_unpack.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)