[RFC,2/3] target/ppc: Bugfix fmul result with OE/UE set

Commit Message

Lucas Mateus Martins Araujo e Castro Aug. 3, 2022, 12:22 p.m. UTC

From: "Lucas Mateus Castro (alqotel)" <[e-mail]>

Change fmul in the same way of fadd/fsub to handle overflow/underflow if
OE/UE is set (i.e. function that receives a value to add/subtract from
the exponent if an overflow/underflow occurs).

Signed-off-by: Lucas Mateus Castro (alqotel) <[e-mail]>
---
 fpu/softfloat.c         | 30 ++++++++++++++++++++++++++++++
 include/fpu/softfloat.h |  1 +
 target/ppc/fpu_helper.c |  5 ++++-
 3 files changed, 35 insertions(+), 1 deletion(-)

Patch

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index a407129dcb..e2b4ad4b63 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2212,6 +2212,36 @@  float64_mul(float64 a, float64 b, float_status *s)
                         f64_is_zon2, f64_addsubmul_post);
 }
 
+static float64 QEMU_SOFTFLOAT_ATTR
+soft_f64_mul_excp_en(float64 a, float64 b, int oe_sub, int ue_sum,
+                     float_status *s)
+{
+    FloatParts64 pa, pb, *pr;
+
+    float64_unpack_canonical(&pa, a, s);
+    float64_unpack_canonical(&pb, b, s);
+    pr = parts_mul(&pa, &pb, s);
+
+    if (unlikely(oe_sub && (pr->exp > 1023))) {
+        pr->exp -= oe_sub;
+        float_raise(float_flag_overflow, s);
+    } else if (unlikely(ue_sum && (pr->exp < -1022))) {
+        pr->exp += ue_sum;
+        float_raise(float_flag_underflow, s);
+    }
+
+    return float64_round_pack_canonical(pr, s);
+}
+
+float64 QEMU_FLATTEN
+float64_mul_excp_en(float64 a, float64 b, int oe_sub, int ue_sum,
+                    float_status *status)
+{
+    return float64_gen2_excp(a, b, oe_sub, ue_sum, status,
+                             hard_f64_mul, soft_f64_mul, soft_f64_mul_excp_en,
+                             f64_is_zon2, f64_addsubmul_post);
+}
+
 float64 float64r32_mul(float64 a, float64 b, float_status *status)
 {
     FloatParts64 pa, pb, *pr;
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 76bf628a29..4ff56b0e10 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -776,6 +776,7 @@  float64 float64_add_excp_en(float64, float64, int, int, float_status *status);
 float64 float64_sub(float64, float64, float_status *status);
 float64 float64_sub_excp_en(float64, float64, int, int, float_status *status);
 float64 float64_mul(float64, float64, float_status *status);
+float64 float64_mul_excp_en(float64, float64, int, int, float_status *status);
 float64 float64_div(float64, float64, float_status *status);
 float64 float64_rem(float64, float64, float_status *status);
 float64 float64_muladd(float64, float64, float64, int, float_status *status);
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index cb82c91340..18cf720743 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -595,7 +595,10 @@  static void float_invalid_op_mul(CPUPPCState *env, int flags,
 /* fmul - fmul. */
 float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2)
 {
-    float64 ret = float64_mul(arg1, arg2, &env->fp_status);
+    int oe_sub = (FP_OE & env->fpscr) ? 1536 : 0;
+    int ue_sum = (FP_UE & env->fpscr) ? 1536 : 0;
+    float64 ret = float64_mul_excp_en(arg1, arg2, oe_sub, ue_sum,
+                                      &env->fp_status);
     int flags = get_float_exception_flags(&env->fp_status);
 
     if (unlikely(flags & float_flag_invalid)) {