From patchwork Mon Aug 29 15:40:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Caggiano X-Patchwork-Id: 12958059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A62FBECAAD2 for ; Mon, 29 Aug 2022 15:43:45 +0000 (UTC) Received: from localhost ([::1]:35758 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oSgvQ-0004tI-LD for qemu-devel@archiver.kernel.org; Mon, 29 Aug 2022 11:43:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41308) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgt1-0002d7-Og for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]:52576) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgsy-0004dn-Li for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from dellino.fritz.box (host-95-235-60-93.retail.telecomitalia.it [95.235.60.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id C837F6601EFC; Mon, 29 Aug 2022 16:41:09 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1661787670; bh=lWh9WyS/F7ucYZTr2NF8e4IrmOwvvuFhoG0/A01n8rU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YI1vRHeSRoh0QAzS8ih1uFGQl6uIa0+OE4/u72bwEwMOOiZ2A1d2VGr25pQYIAp1S mwAWUZ/3KYEhdnHIBqxsGv37wTvkFRA7ah4djQAnS/wQKVFzrDXPaQGzG1AbQ6GJOD fOdXZ6iyHz4FwzcqKqUhC1QjLGqfcluV26mGQXVuy6d80mu69JAETKvNUTBqmuSFBx HtmQzcaZ8ZwSCEJIV4LrtzpvA434Wi3sacFnaeECSb4LNFjtV6OOG7pDhHiCPXJq9O F8Rz+VmTqqxbZZNv07rDcmWd11nIqNPmTyWzb5gelf8rQcMuwvbkSHtcshAFEg0CuW Smdh9YMxy5zYQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, "Dr. David Alan Gilbert" , "Michael S. Tsirkin" Subject: [PATCH 2/5] virtio: Add shared memory capability Date: Mon, 29 Aug 2022 17:40:55 +0200 Message-Id: <20220829154058.524413-3-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' and the data structure 'virtio_pci_shm_cap' to go with it. They allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead. v3: No need for mask32 as cpu_to_le32 truncates the value. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a50c5a57d7..377bb06fec 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1169,6 +1169,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length); + cap.length_hi = cpu_to_le32(length >> 32); + cap.cap.offset = cpu_to_le32(offset); + cap.offset_hi = cpu_to_le32(offset >> 32); + cap.cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 2446dcd9ae..5e5c4a4c6d 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif