[PULL,12/44] roms/opensbi: Upgrade from v1.0 to v1.1

From: Bin Meng <bmeng.cn@gmail.com>

From: Bin Meng <bmeng.cn@gmail.com>

Upgrade OpenSBI from v1.0 to v1.1 and the pre-built bios images.

The v1.1 release includes the following commits:

5b99603 lib: utils/ipi: Fix size check in aclint_mswi_cold_init()
6dde435 lib: utils/sys: Extend HTIF library to allow custom base address
8257262 platform: sifive_fu740: do not use a global in da9063_reset/shutdown
fb688d9 platform: sifive_fu740: fix reset when watchdog is running
5d025eb lib: fix pointer of type 'void *' used in arithmetic
632f593 lib: sbi: Map only the counters enabled in hardware
3b7c204 lib: sbi: Disable interrupt during config matching
a26dc60 lib: sbi: Disable interrupt and inhibit counting in M-mode during init
5d53b55 Makefile: fix build with binutils 2.38
6ad8917 lib: fix compilation when strings.h is included
ce4c018 lib: utils/serial: Round UART8250 baud rate divisor to nearest integer
01250d0 include: sbi: Add AIA related CSR defines
8f96070 lib: sbi: Detect AIA CSRs at boot-time
65b4c7c lib: sbi: Use AIA CSRs for local interrupts when available
222132f lib: sbi: Add sbi_trap_set_external_irqfn() API
5f56314 lib: utils/irqchip: Allow multiple FDT irqchip drivers
1050940 include: sbi: Introduce nascent_init() platform callback
55e79f8 lib: sbi: Enable mie.MEIE bit for IPIs based on external interrupts.
9f73669 lib: utils/irqchip: Add IMSIC library
811da5c lib: utils/irqchip: Add FDT based driver for IMSIC
7127aaa lib: utils: Disable appropriate IMSIC DT nodes in fdt_fixups()
9979265 lib: utils/irqchip: Add APLIC initialization library
3461219 lib: utils/irqchip: Add FDT based driver for APLIC
8e2ef4f lib: utils: Disable appropriate APLIC DT nodes in fdt_fixups()
3a69cc1 lib: sbi: fix typo in is_region_subset
f2ccf2f lib: sbi: verbose sbi_domain_root_add_memregion
f3f4604 lib: sbi: Add a simple external interrupt handling framework
4998a71 lib: utils: serial: Initial commit of xlnx-uartlite
2dfbd3c lib: pmp_set/pmp_get moved errors from runtime to compile time
b6b7220 firmware: Fix code for accessing hart_count and stack_size
d552fc8 lib: Add error messages via conditional compilation for the future
555bdb1 include: Use static asserts for SBI_PLATFORM_xxx_OFFSET defines
1b42d3a include: Use static asserts for SBI_SCRATCH_xxx_OFFSET defines
7924a0b include: Use static asserts for FW_DYNAMIC_INFO_xxx_OFFSET defines
722f80d include: Add defines for [m|h|s]envcfg CSRs
31fecad lib: sbi: Detect menvcfg CSR at boot time
47d6765 lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR
794986f lib: sbi: Enable Svpbmt extension in the menvcfg CSR
499601a lib: sbi: Add Smstateen extension defines
d44568a lib: sbi: Detect Smstateen CSRs at boot-time
3383d6a lib: irqchip/imsic: configure mstateen
5c5cbb5 lib: utils/serial: support 'reg-offset' property
c1e47d0 include: correct the definition of MSTATUS_VS
9cd95e1 lib: sbi/hart: preserve csr validation value
4035ae9 docs: pmu: Improve the PMU DT bindings
d62f6da lib: sbi: Implement Sstc extension
474a9d4 lib: sbi: Fix mstatus_init() for RV32 when Sscofpmf is not available
e576b3e include: sbi: Define SBI_PMU_HW_EVENT_MAX to 256
b0c9df5 lib: sbi: Fix mhpmeventh access for rv32 in absence of sscofpmf
1a754bb lib: sbi: Detect and print privileged spec version
5a6be99 lib: sbi: Remove 's' and 'u' from misa_string() output
5b8b377 lib: sbi: Update the name of ISA string printed at boot time
d4b563c lib: sbi: Remove MCOUNTEREN and SCOUNTEREN hart features
dbc3d8f lib: sbi: Remove MCOUNTINHIBT hart feature
97a17c2 lib: sbi: Remove MENVCFG hart feature
a6ab94f lib: sbi: Fix AIA feature detection
cad6c91 lib: sbi: Convert hart features into hart extensions
be4903a lib: sbi: Detect hart features only once for each hart
994ace3 lib: sbi: Add sbi_hart_update_extension() function
023f0ad lib: sbi_platform: Add callback to populate HART extensions
f726f2d Makefile: Allow generated C source to be anywhere in build directory
7fb474b Makefile: Add support for generating C array at compile time
73cf511 lib: utils/reset: Generate FDT reset driver list at compile-time
1e62705 lib: utils/serial: Generate FDT serial driver list at compile-time
bfeb305 lib: utils/timer: Generate FDT timer driver list at compile-time
3a69d12 lib: utils/irqchip: Generate FDT irqchip driver list at compile-time
4ee0c57 lib: utils/ipi: Generate FDT ipi driver list at compile-time
998ed43 lib: utils/i2c: Generate FDT i2c adapter driver list at compile-time
4eacd82 lib: utils/gpio: Generate FDT gpio driver list at compile-time
a3a3c60 platform: generic: Generate platform override module list at compile-time
9a7a677 platform: generic: Move Sifive platform overrides into own directory
851c14d lib: utils/irqchip: fix typo when checking for CPU node
90a9dd2 lib: utils/fdt: introduce fdt_node_is_enabled()
616da52 lib: utils: check if CPU node is enabled
575bb4e platform: generic: check if CPU node is enabled
1bc67db lib: utils/fdt: rename fdt_parse_max_hart_id
f067bb8 lib: sbi: fix system_opcode_insn
fab0379 lib: utils/fdt: Require match data to be const
295e5f3 lib: sbi_timer: Drop unnecessary get_platform_ticks wrapper
ff65bfe lib: sbi_illegal_insn: Constify illegal_insn_table
cb8271c lib: sbi_illegal_insn: Add emulation for fence.tso
adc3388 lib: sbi_trap: Redirect exception based on hedeleg
ce1d618 platform: generic: add overrides for vendor extensions
b20ed9f lib: sbi_hsm: Call a device hook during hart resume
79e42eb lib: sbi_hsm: Assume a consistent resume address
2ea7799 lib: irqchip/plic: Constify plic_data pointers
8c362e7 lib: irqchip/plic: Factor out a context init function
415ecf2 lib: irqchip/plic: Add context save/restore helpers
2b79b69 lib: irqchip/plic: Add priority save/restore helpers
69be3df lib: utils/irqchip: Add FDT wrappers for PLIC save/restore functions
5e56758 lib: utils/irqchip: Add wrapper for T-HEAD PLIC delegation
9dc5ec5 platform: Add HSM implementation for Allwinner D1
551c70c include: sbi: Add mtinst/htinst psuedoinstructions
187127f lib: sbi: Fixup tinst for exceptions in sbi_misaligned_*()
a07402a lib: sbi: Fix tval and tinst for sbi_get_insn()
c653001 lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bits
7738345 lib: utils/timer: Add a separate compatible for the D1 CLINT
d76a196 lib: irqchip/plic: fix typo in plic_warm_irqchip_init
6f1fe98 lib: utils/timer: Remove Allwinner D1 CLINT compatibles
c6fdbcf include: sbi: Change spec version to 1.0
3f66465 lib: pmu: allow to use the highest available counter
4489876 include: Bump-up version to 1.1

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220713090613.204046-1-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 .../opensbi-riscv32-generic-fw_dynamic.bin    | Bin 108504 -> 117704 bytes
 .../opensbi-riscv64-generic-fw_dynamic.bin    | Bin 105296 -> 115344 bytes
 roms/opensbi                                  |   2 +-
 3 files changed, 1 insertion(+), 1 deletion(-)

Message ID	20220907080353.111926-13-alistair.francis@wdc.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> IronPort-SDR: Y64Qfvzht7zSFi7/vwx2+Rt4kZKQ1IQMp9tCGl7o+UDXbm8NfWmBJnwz7daEfZWP0jTwAnJ/7x OQ4rmoiALBKAomYyDoRyyYo0ogr45FokweL/xr76svzXWpi1q6GVh3wr0+tkrizaCHVnILCTm5 tfuqX3rsFnrlA6/3Cb9qOdAbkU6XVVWcvX1bc3xsXYt8oK0ZgSwMw5a0GasnohyEzVGYxo8WWV nbzvv64uEK3wArLBxw3wQfjutEAC46IN56lY5HasCRvHFnRGl1KV3Uqoy7gJ+iuK8jtrH345wR DXnTtzCnIkJbuClcg93+ycjr IronPort-SDR: pAPr78m2em2kwUO1hMCn44zg84ermrC+78BReyvywgt3st/a2+0ePuRprL3i4hufMIulBNbRAe QduM2vI2NNFTtvG+YnM8lLNo7hrk37brwvMlJF2J/5Sg4sv+vCM2USpXbVHWXpGl2fV/+DWNXw 8MFQgRrYE2ePKrODIjVegx8vihfk4JALSzKlql+21o5+AcpUXhUbUzs4HV+O880HfEvwuMwW1S L/Ot8ttErd7wgt+5vAgu+oYFLi3WpK2++dwkZ5TZm3vHjNB7PMPSgxJ4P92R0zlX4fStf/ljuI SfY= WDCIronportException: Internal To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: alistair23@gmail.com, Bin Meng <bmeng.cn@gmail.com>, Alistair Francis <alistair.francis@wdc.com> Subject: [PULL 12/44] roms/opensbi: Upgrade from v1.0 to v1.1 Date: Wed, 7 Sep 2022 10:03:21 +0200 Message-Id: <20220907080353.111926-13-alistair.francis@wdc.com> In-Reply-To: <20220907080353.111926-1-alistair.francis@wdc.com> References: <20220907080353.111926-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=242877ce7=alistair.francis@wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> Reply-to: Alistair Francis <alistair.francis@wdc.com> From: Alistair Francis via <qemu-devel@nongnu.org>
Series	[PULL,01/44] target/riscv: Update [m\|h]tinst CSR in riscv_cpu_do_interrupt() \| expand [PULL,01/44] target/riscv: Update [m\|h]tinst CSR in riscv_cpu_do_interrupt() [PULL,02/44] target/riscv: Force disable extensions if priv spec version does not match [PULL,03/44] target/riscv: fix shifts shamt value for rv128c [PULL,04/44] target/riscv: move zmmul out of the experimental properties [PULL,05/44] hw/riscv: virt: pass random seed to fdt [PULL,06/44] target/riscv: Add check for supported privilege mode combinations [PULL,07/44] target/riscv: H extension depends on I extension [PULL,08/44] target/riscv: Fix checkpatch warning may triggered in csr_ops table [PULL,09/44] target/riscv: Add check for csrs existed with U extension [PULL,10/44] target/riscv: Fix checks in hmode/hmode32 [PULL,11/44] target/riscv: Simplify the check in hmode to reuse the check in riscv_csrrw_check [PULL,12/44] roms/opensbi: Upgrade from v1.0 to v1.1 [PULL,13/44] target/riscv: Fix typo and restore Pointer Masking functionality for RISC-V [PULL,14/44] docs: List kvm as a supported accelerator on RISC-V [PULL,15/44] target/riscv: rvv: Add mask agnostic for vv instructions [PULL,16/44] target/riscv: rvv: Add mask agnostic for vector load / store instructions [PULL,17/44] target/riscv: rvv: Add mask agnostic for vx instructions [PULL,18/44] target/riscv: rvv: Add mask agnostic for vector integer shift instructions [PULL,19/44] target/riscv: rvv: Add mask agnostic for vector integer comparison instructions [PULL,20/44] target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instructions [PULL,21/44] target/riscv: rvv: Add mask agnostic for vector floating-point instructions [PULL,22/44] target/riscv: rvv: Add mask agnostic for vector mask instructions [PULL,23/44] target/riscv: rvv: Add mask agnostic for vector permutation instructions [PULL,24/44] target/riscv: rvv: Add option 'rvv_ma_all_1s' to enable optional mask agnostic behavior [PULL,25/44] target/riscv: Add Zihintpause support [PULL,26/44] hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() [PULL,27/44] target/riscv: Fix priority of csr related check in riscv_csrrw_check [PULL,28/44] hw/riscv: opentitan: bump opentitan version [PULL,29/44] hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals [PULL,30/44] target/riscv: Remove additional priv version check for mcountinhibit [PULL,31/44] hw/riscv: virt: fix uart node name [PULL,32/44] hw/riscv: virt: fix the plic's address cells [PULL,33/44] hw/riscv: virt: fix syscon subnode paths [PULL,34/44] hw/core: fix platform bus node name [PULL,35/44] target/riscv: Add xicondops in ISA entry [PULL,36/44] target/riscv: Use official extension names for AIA CSRs [PULL,37/44] hw/intc: Move mtimer/mtimecmp to aclint [PULL,38/44] target/riscv: Add stimecmp support [PULL,39/44] target/riscv: Add vstimecmp support [PULL,40/44] target/riscv: Add sscofpmf extension support [PULL,41/44] target/riscv: Simplify counter predicate function [PULL,42/44] target/riscv: Add few cache related PMU events [PULL,43/44] hw/riscv: virt: Add PMU DT node to the device tree [PULL,44/44] target/riscv: Update the privilege field for sscofpmf CSRs

[PULL,12/44] roms/opensbi: Upgrade from v1.0 to v1.1

Commit Message

Patch