| Message ID | 20220926142422.22325-3-antonio.caggiano@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | virtio-gpu: Support Venus Vulkan driver | expand |
Antonio Caggiano <antonio.caggiano@collabora.com> writes: > From: Gerd Hoffmann <kraxel@redhat.com> > > Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. > > Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com> > Acked-by: Michael S. Tsirkin <mst@redhat.com> > --- > v3: Formatting fixes > > hw/display/virtio-gpu-pci.c | 15 +++++++++++++++ > hw/display/virtio-gpu.c | 1 + > hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- > include/hw/virtio/virtio-gpu.h | 5 +++++ > 4 files changed, 45 insertions(+), 9 deletions(-) > > diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c > index 93f214ff58..2cbbacd7fe 100644 > --- a/hw/display/virtio-gpu-pci.c > +++ b/hw/display/virtio-gpu-pci.c > @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) > DeviceState *vdev = DEVICE(g); > int i; > > + if (virtio_gpu_hostmem_enabled(g->conf)) { > + vpci_dev->msix_bar_idx = 1; > + vpci_dev->modern_mem_bar_idx = 2; > + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", > + g->conf.hostmem); > + pci_register_bar(&vpci_dev->pci_dev, 4, > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH | > + PCI_BASE_ADDRESS_MEM_TYPE_64, > + &g->hostmem); > + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, > + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); > + } > + > + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); > virtio_pci_force_virtio_1(vpci_dev); > if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { > return; > diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c > index 20cc703dcc..506b3b8eef 100644 > --- a/hw/display/virtio-gpu.c > +++ b/hw/display/virtio-gpu.c > @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] = { > 256 * MiB), > DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, > VIRTIO_GPU_FLAG_BLOB_ENABLED, false), > + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, > 0), I note we don't have a definition for -device virtio-gpu or virtio-gpu-pci in the invocation section of the manual (missing from qemu-options.hx). Given the growing complexity of the device perhaps we need those options and perhaps a new section under: https://qemu.readthedocs.io/en/latest/system/device-emulation.html#emulated-devices to outline how virtio-gpu works and what these control knobs are for and why they would be used. > DEFINE_PROP_END_OF_LIST(), > }; > > diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c > index 4dcb34c4a7..aa8d1ab993 100644 > --- a/hw/display/virtio-vga.c > +++ b/hw/display/virtio-vga.c > @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) > pci_register_bar(&vpci_dev->pci_dev, 0, > PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); > > - /* > - * Configure virtio bar and regions > - * > - * We use bar #2 for the mmio regions, to be compatible with stdvga. > - * virtio regions are moved to the end of bar #2, to make room for > - * the stdvga mmio registers at the start of bar #2. > - */ > - vpci_dev->modern_mem_bar_idx = 2; > - vpci_dev->msix_bar_idx = 4; > vpci_dev->modern_io_bar_idx = 5; > > + if (!virtio_gpu_hostmem_enabled(g->conf)) { > + /* > + * Configure virtio bar and regions > + * > + * We use bar #2 for the mmio regions, to be compatible with stdvga. > + * virtio regions are moved to the end of bar #2, to make room for > + * the stdvga mmio registers at the start of bar #2. > + */ > + vpci_dev->modern_mem_bar_idx = 2; > + vpci_dev->msix_bar_idx = 4; > + } else { > + vpci_dev->msix_bar_idx = 1; > + vpci_dev->modern_mem_bar_idx = 2; modern_mem_bar_idx is the same for both legs so why move its setting and comment out of the common path? There is no comment for why msix_bar_idx moves between the two legs. > + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", > + g->conf.hostmem); > + pci_register_bar(&vpci_dev->pci_dev, 4, > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH | > + PCI_BASE_ADDRESS_MEM_TYPE_64, > + &g->hostmem); > + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, > + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); > + } > + > if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { > /* > * with page-per-vq=off there is no padding space we can use > diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h > index 2e28507efe..eafce75b04 100644 > --- a/include/hw/virtio/virtio-gpu.h > +++ b/include/hw/virtio/virtio-gpu.h > @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) > #define virtio_gpu_blob_enabled(_cfg) \ > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) > +#define virtio_gpu_hostmem_enabled(_cfg) \ > + (_cfg.hostmem > 0) > > struct virtio_gpu_base_conf { > uint32_t max_outputs; > uint32_t flags; > uint32_t xres; > uint32_t yres; > + uint64_t hostmem; > }; > > struct virtio_gpu_ctrl_command { > @@ -131,6 +134,8 @@ struct VirtIOGPUBase { > int renderer_blocked; > int enable; > > + MemoryRegion hostmem; > + > struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; > > int enabled_output_bitmask;
diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..2cbbacd7fe 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) DeviceState *vdev = DEVICE(g); int i; + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 20cc703dcc..506b3b8eef 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] = { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a7..aa8d1ab993 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx = 2; - vpci_dev->msix_bar_idx = 4; vpci_dev->modern_io_bar_idx = 5; + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvga. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx = 2; + vpci_dev->msix_bar_idx = 4; + } else { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=off there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..eafce75b04 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; int enabled_output_bitmask;