diff mbox series

[v2,1/3] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition

Message ID 20221027204720.33611-2-philmd@linaro.org (mailing list archive)
State New, archived
Headers show
Series hw/isa/piix4: Remove MIPS Malta specific bits | expand

Commit Message

Philippe Mathieu-Daudé Oct. 27, 2022, 8:47 p.m. UTC
The PIIX4 PCI-ISA bridge function is always located at 10:0.
Since we want to re-use its address, add the PIIX4_PCI_DEVFN
definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/malta.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Bernhard Beschow Dec. 18, 2022, 4:48 p.m. UTC | #1
Am 27. Oktober 2022 20:47:18 UTC schrieb "Philippe Mathieu-Daudé" <philmd@linaro.org>:
>The PIIX4 PCI-ISA bridge function is always located at 10:0.
>Since we want to re-use its address, add the PIIX4_PCI_DEVFN
>definition.
>
>Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>---

Reviewed-by: Bernhard Beschow <shentey@gmail.com>

> hw/mips/malta.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
>diff --git a/hw/mips/malta.c b/hw/mips/malta.c
>index 272d93eea7..df0f448b67 100644
>--- a/hw/mips/malta.c
>+++ b/hw/mips/malta.c
>@@ -72,6 +72,8 @@
> 
> #define MAX_IDE_BUS         2
> 
>+#define PIIX4_PCI_DEVFN     PCI_DEVFN(10, 0)
>+
> typedef struct {
>     MemoryRegion iomem;
>     MemoryRegion iomem_lo; /* 0 - 0x900 */
>@@ -1377,7 +1379,7 @@ void mips_malta_init(MachineState *machine)
>     empty_slot_init("GT64120", 0, 0x20000000);
> 
>     /* Southbridge */
>-    piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true,
>+    piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true,
>                                             TYPE_PIIX4_PCI_DEVICE);
>     dev = DEVICE(piix4);
>     isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
diff mbox series

Patch

diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 272d93eea7..df0f448b67 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -72,6 +72,8 @@ 
 
 #define MAX_IDE_BUS         2
 
+#define PIIX4_PCI_DEVFN     PCI_DEVFN(10, 0)
+
 typedef struct {
     MemoryRegion iomem;
     MemoryRegion iomem_lo; /* 0 - 0x900 */
@@ -1377,7 +1379,7 @@  void mips_malta_init(MachineState *machine)
     empty_slot_init("GT64120", 0, 0x20000000);
 
     /* Southbridge */
-    piix4 = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true,
+    piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true,
                                             TYPE_PIIX4_PCI_DEVICE);
     dev = DEVICE(piix4);
     isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));