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[107.142.220.210]) by smtp.gmail.com with ESMTPSA id t1-20020a05620a450100b006ee7e223bb8sm3142792qkp.39.2022.10.28.08.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 08:03:24 -0700 (PDT) From: Liang Yan X-Google-Original-From: Liang Yan To: Cc: Paolo Bonzini , Richard Henderson , Yang Zhong , Vitaly Kuznetsov , Jing Liu , qemu-devel@nongnu.org (open list:All patches CC here) Subject: [PATCH] target/i386/cpu: disable PERFCORE for AMD when cpu.pmu is off Date: Fri, 28 Oct 2022 11:02:43 -0400 Message-Id: <20221028150243.34514-1-lyan@digtalocean.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::d2c; envelope-from=lyan@digitalocean.com; helo=mail-io1-xd2c.google.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.516, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 28 Oct 2022 11:15:43 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org With cpu.pmu=off, perfctr_core could still be seen in an AMD guest cpuid. By further digging, I found cpu.perfctr_core did the trick. However, considering the 'enable_pmu' in KVM could work on both Intel and AMD, we may add AMD PMU control under 'enabe_pmu' in QEMU too. This change will overide the property 'perfctr_ctr' and change the AMD PMU to off by default. Signed-off-by: Liang Yan --- target/i386/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 22b681ca37..edf5413c90 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5706,6 +5706,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *ecx |= 1 << 1; /* CmpLegacy bit */ } } + + if (!cpu->enable_pmu) { + *ecx &= ~CPUID_EXT3_PERFCORE; + } break; case 0x80000002: case 0x80000003: