From patchwork Tue Nov 1 14:55:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13027257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B00D3C433FE for ; Tue, 1 Nov 2022 17:13:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opsgm-0006pp-PG; Tue, 01 Nov 2022 10:56:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opsgl-0006pa-8P for qemu-devel@nongnu.org; Tue, 01 Nov 2022 10:56:27 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1opsgj-0003JY-5y for qemu-devel@nongnu.org; Tue, 01 Nov 2022 10:56:26 -0400 Received: by mail-pg1-x536.google.com with SMTP id 20so13644331pgc.5 for ; Tue, 01 Nov 2022 07:56:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OuJGfEqiahgje0+ZI8xfhUI2kNLbWBqS9djVvTbLrXo=; b=p9FQa8xmic5mtd5S+I4xq9r8efA3amIHknEr1I0skje9GfsBAEYP1fUH+/R7fPus1c w9hfUhA6uBs2eFr7clpIkGFAQAbqSES8eGesc3PfibZU6zT2B2h8nLrP0aBaGLN5nKMb QRivOT0sRtGqAphfFJRgtZmC49+GShgi9MPXR0Ai9gKag2HwFbVRwP8+Y90EO1/WPKww E0DM3EYxxu1D3BVAimhHXEXy8ZkXvrS7ArgGRodLQCNMY9mVU2wd5wUFwVcZcma0WkZ/ MtQ5AtrJZKPtyjroUqQgP70RZkcU5sEE+ANqw/9FxEi/7I3324KT/GIFEoXehJTF6IVZ c4Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OuJGfEqiahgje0+ZI8xfhUI2kNLbWBqS9djVvTbLrXo=; b=VkoGNqAORxXwKoevvwL6RVZW1xzIYCEAQvEGT+vH5eAKwwUChMHoOBbnxNooibEKUP YJB4VBP4Ntia8YHZAnl4JCbPXSC/Am1etsiYLGQL6fCvrCKMc8SazJ9Hb453TYtvBXhV VqdQg30h08ru3Nbt63L/AbJXRGOuddDVz9nJ3DTMN5dIvgepH+BeF39z5MMxHJCCqWBe LskhHM7sngPdfgqolZ06/fRI/W87iaFrOOhHhySkzsnVa/E0AAcx2MRhbaBrKSi1gElc XBQP2UlK6/mgaJnDI0jNcTbsX6+mk2OZwtyYptQ4vZqz0NDrfwoIznfmZGlUCm6hn/C3 gTGQ== X-Gm-Message-State: ACrzQf1Kuip+9+GQoj6dM5qvV4h8TD7CiS3/FkC0BlKsZ+kZcI2as/DV jc/wPn9RiXlir6fgzQj2hTzoKYuKOgfuofNi X-Google-Smtp-Source: AMsMyM6j/tc86V8RJkEKHRDcIVyGFvj3KDligIykrPR9lgUX+fHDZAjyzK8gEP8ztIbpB/OaAfZUgw== X-Received: by 2002:a05:6a00:14d2:b0:56c:b1c5:c5da with SMTP id w18-20020a056a0014d200b0056cb1c5c5damr20581093pfu.2.1667314583255; Tue, 01 Nov 2022 07:56:23 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id 22-20020a631656000000b0046f9f4a2de6sm4783219pgw.74.2022.11.01.07.56.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Nov 2022 07:56:22 -0700 (PDT) From: Akihiko Odaki To: Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= , Akihiko Odaki Subject: [PATCH v9 03/17] hw/i386/amd_iommu: Omit errp for pci_add_capability Date: Tue, 1 Nov 2022 23:55:44 +0900 Message-Id: <20221101145558.3998-4-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221101145558.3998-1-akihiko.odaki@daynix.com> References: <20221101145558.3998-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::536; envelope-from=akihiko.odaki@daynix.com; helo=mail-pg1-x536.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org+qemu-devel=archiver.kernel.org@nongnu.org Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. This behavior is appropriate here because all of the capabilities set in this device are defined in the program and their overlap should not happen unless there is a programming error. Signed-off-by: Akihiko Odaki --- hw/i386/amd_iommu.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 725f69095b..8a88cbea0a 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1539,7 +1539,6 @@ static void amdvi_sysbus_reset(DeviceState *dev) static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) { - int ret = 0; AMDVIState *s = AMD_IOMMU_DEVICE(dev); MachineState *ms = MACHINE(qdev_get_machine()); PCMachineState *pcms = PC_MACHINE(ms); @@ -1553,23 +1552,11 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(&s->pci), &bus->qbus, errp)) { return; } - ret = pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0, - AMDVI_CAPAB_SIZE, errp); - if (ret < 0) { - return; - } - s->capab_offset = ret; + s->capab_offset = pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0, + AMDVI_CAPAB_SIZE); - ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_MSI, 0, - AMDVI_CAPAB_REG_SIZE, errp); - if (ret < 0) { - return; - } - ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_HT, 0, - AMDVI_CAPAB_REG_SIZE, errp); - if (ret < 0) { - return; - } + pci_add_capability(&s->pci.dev, PCI_CAP_ID_MSI, 0, AMDVI_CAPAB_REG_SIZE); + pci_add_capability(&s->pci.dev, PCI_CAP_ID_HT, 0, AMDVI_CAPAB_REG_SIZE); /* Pseudo address space under root PCI bus. */ x86ms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID);