diff mbox series

[PULL,v4,46/83] acpi: pc/q35: drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration generate AML

Message ID 20221107224600.934080-47-mst@redhat.com (mailing list archive)
State New, archived
Headers show
Series [PULL,v4,01/83] hw/i386/e820: remove legacy reserved entries for e820 | expand

Commit Message

Michael S. Tsirkin Nov. 7, 2022, 10:51 p.m. UTC 
From: Igor Mammedov <imammedo@redhat.com>

PCI-ISA bridges that are built in PIIX/Q35 are building its own AML
using AcpiDevAmlIf interface. Now build_append_pci_bus_devices()
gained AcpiDevAmlIf interface support to get AML of devices atached
to PCI slots.
So drop ad-hoc build_q35_isa_bridge()/build_piix4_isa_bridge()
and let PCI bus enumeration to include PCI-ISA bridge AML
when it's enumerated by build_append_pci_bus_devices().

AML change is mostly contextual, which moves whole ISA hierarchy
directly under PCI host bridge instead of it being described
as separate \SB.PCI0.ISA block.

Note:
If bus/slot that hosts ISA bridge has BSEL set, it will gain new
ASUN and _DMS entries (i.e. acpi-index support, but it should not
cause any functional change and that is fine from PCI Firmware
spec point of view), potentially it's possible to suppress that
by adding a flag to PCIDevice but I don't see a reason to do that
yet, I'd rather treat bridge just as any other PCI device if it's
possible.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221017102146.2254096-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/i386/acpi-build.c | 75 --------------------------------------------
 hw/isa/lpc_ich9.c    | 23 ++++++++++++++
 hw/isa/piix3.c       | 17 +++++++++-
 3 files changed, 39 insertions(+), 76 deletions(-)

Comments

Volker Rümelin Nov. 17, 2022, 9:51 p.m. UTC | #1 
> From: Igor Mammedov<imammedo@redhat.com>
>
> PCI-ISA bridges that are built in PIIX/Q35 are building its own AML
> using AcpiDevAmlIf interface. Now build_append_pci_bus_devices()
> gained AcpiDevAmlIf interface support to get AML of devices atached
> to PCI slots.
> So drop ad-hoc build_q35_isa_bridge()/build_piix4_isa_bridge()
> and let PCI bus enumeration to include PCI-ISA bridge AML
> when it's enumerated by build_append_pci_bus_devices().
>
> AML change is mostly contextual, which moves whole ISA hierarchy
> directly under PCI host bridge instead of it being described
> as separate \SB.PCI0.ISA block.
>
> Note:
> If bus/slot that hosts ISA bridge has BSEL set, it will gain new
> ASUN and _DMS entries (i.e. acpi-index support, but it should not
> cause any functional change and that is fine from PCI Firmware
> spec point of view), potentially it's possible to suppress that
> by adding a flag to PCIDevice but I don't see a reason to do that
> yet, I'd rather treat bridge just as any other PCI device if it's
> possible.
>
> Signed-off-by: Igor Mammedov<imammedo@redhat.com>
> Message-Id:<20221017102146.2254096-4-imammedo@redhat.com>
> Reviewed-by: Michael S. Tsirkin<mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin<mst@redhat.com>
> ---
>   hw/i386/acpi-build.c | 75 --------------------------------------------
>   hw/isa/lpc_ich9.c    | 23 ++++++++++++++
>   hw/isa/piix3.c       | 17 +++++++++-
>   3 files changed, 39 insertions(+), 76 deletions(-)

Hi Igor,

since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
the PS/2 keyboard without issues.

Here are a few lines from the SeaBIOS debug log.

table(50434146)=0x007e1971 (via rsdt)
ACPI: parse DSDT at 0x007e0040 (len 6449)
parse_termlist: parse error, skip from 92/465
Scan for VGA option rom
Running option rom at c000:0003
Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)

and later

SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
ACPI: no PS/2 keyboard present

It doesn't matter if the machine type is pc or q35.

If I revert this patch, the PS/2 keyboard works again.

With best regards,
Volker
Igor Mammedov Nov. 18, 2022, 1:08 p.m. UTC | #2 
On Thu, 17 Nov 2022 22:51:46 +0100
Volker Rümelin <vr_qemu@t-online.de> wrote:

> > From: Igor Mammedov<imammedo@redhat.com>
> >
> > PCI-ISA bridges that are built in PIIX/Q35 are building its own AML
> > using AcpiDevAmlIf interface. Now build_append_pci_bus_devices()
> > gained AcpiDevAmlIf interface support to get AML of devices atached
> > to PCI slots.
> > So drop ad-hoc build_q35_isa_bridge()/build_piix4_isa_bridge()
> > and let PCI bus enumeration to include PCI-ISA bridge AML
> > when it's enumerated by build_append_pci_bus_devices().
> >
> > AML change is mostly contextual, which moves whole ISA hierarchy
> > directly under PCI host bridge instead of it being described
> > as separate \SB.PCI0.ISA block.
> >
> > Note:
> > If bus/slot that hosts ISA bridge has BSEL set, it will gain new
> > ASUN and _DMS entries (i.e. acpi-index support, but it should not
> > cause any functional change and that is fine from PCI Firmware
> > spec point of view), potentially it's possible to suppress that
> > by adding a flag to PCIDevice but I don't see a reason to do that
> > yet, I'd rather treat bridge just as any other PCI device if it's
> > possible.
> >
> > Signed-off-by: Igor Mammedov<imammedo@redhat.com>
> > Message-Id:<20221017102146.2254096-4-imammedo@redhat.com>
> > Reviewed-by: Michael S. Tsirkin<mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin<mst@redhat.com>
> > ---
> >   hw/i386/acpi-build.c | 75 --------------------------------------------
> >   hw/isa/lpc_ich9.c    | 23 ++++++++++++++
> >   hw/isa/piix3.c       | 17 +++++++++-
> >   3 files changed, 39 insertions(+), 76 deletions(-)  
> 
> Hi Igor,
> 
> since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
> there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
> the PS/2 keyboard without issues.
> 
> Here are a few lines from the SeaBIOS debug log.
> 
> table(50434146)=0x007e1971 (via rsdt)
> ACPI: parse DSDT at 0x007e0040 (len 6449)
> parse_termlist: parse error, skip from 92/465
> Scan for VGA option rom
> Running option rom at c000:0003
> Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> 
> and later
> 
> SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> ACPI: no PS/2 keyboard present

it looks like SeaBIOS looks for EISA id,
but what is strange is that this patch doesn't have anything
that touches eisaid.

I'll have to debug seabios to figure out why this patch
affects it.

> 
> It doesn't matter if the machine type is pc or q35.
> 
> If I revert this patch, the PS/2 keyboard works again.
> 
> With best regards,
> Volker
> 
> 
> 
> 
>
Igor Mammedov Nov. 18, 2022, 2:55 p.m. UTC | #3 
On Fri, 18 Nov 2022 14:08:36 +0100
Igor Mammedov <imammedo@redhat.com> wrote:

> On Thu, 17 Nov 2022 22:51:46 +0100
> Volker Rümelin <vr_qemu@t-online.de> wrote:
[...]
> > since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
> > there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
> > the PS/2 keyboard without issues.
> > 
> > Here are a few lines from the SeaBIOS debug log.
> > 
> > table(50434146)=0x007e1971 (via rsdt)
> > ACPI: parse DSDT at 0x007e0040 (len 6449)
> > parse_termlist: parse error, skip from 92/465
> > Scan for VGA option rom
> > Running option rom at c000:0003
> > Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > 
> > and later
> > 
> > SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > ACPI: no PS/2 keyboard present  
it was a bug on SeaBIOS side, we need it to parse Alias term in AML
instead of choking on it

proposed patch:
 https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/

PS:
it's probably too late for it to make into 7.2
Volker Rümelin Nov. 19, 2022, 8:49 a.m. UTC | #4 
Am 18.11.22 um 15:55 schrieb Igor Mammedov:
> On Fri, 18 Nov 2022 14:08:36 +0100
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> On Thu, 17 Nov 2022 22:51:46 +0100
>> Volker Rümelin <vr_qemu@t-online.de> wrote:
> [...]
>>> since this patch SeaBIOS no longer detects the PS/2 keyboard. This means
>>> there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect
>>> the PS/2 keyboard without issues.
>>>
>>> Here are a few lines from the SeaBIOS debug log.
>>>
>>> table(50434146)=0x007e1971 (via rsdt)
>>> ACPI: parse DSDT at 0x007e0040 (len 6449)
>>> parse_termlist: parse error, skip from 92/465
>>> Scan for VGA option rom
>>> Running option rom at c000:0003
>>> Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
>>>
>>> and later
>>>
>>> SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
>>> ACPI: no PS/2 keyboard present
> it was a bug on SeaBIOS side, we need it to parse Alias term in AML
> instead of choking on it
>
> proposed patch:
>   https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/
>
> PS:
> it's probably too late for it to make into 7.2
>

The proposed patch works.

It may still be an option to revert the commit 47a373faa6 (acpi: pc/q35: 
drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration 
generate AML). If an older QEMU version is migrated to QEMU 7.2.0 and 
later and the guest reboots afterwards, it may end up without a working 
keyboard because the migrated SeaBIOS is an older version.

With best regards,
Volker
Michael S. Tsirkin Nov. 19, 2022, 5:22 p.m. UTC | #5 
On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> On Fri, 18 Nov 2022 14:08:36 +0100
> Igor Mammedov <imammedo@redhat.com> wrote:
> 
> > On Thu, 17 Nov 2022 22:51:46 +0100
> > Volker Rümelin <vr_qemu@t-online.de> wrote:
> [...]
> > > since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
> > > there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
> > > the PS/2 keyboard without issues.
> > > 
> > > Here are a few lines from the SeaBIOS debug log.
> > > 
> > > table(50434146)=0x007e1971 (via rsdt)
> > > ACPI: parse DSDT at 0x007e0040 (len 6449)
> > > parse_termlist: parse error, skip from 92/465
> > > Scan for VGA option rom
> > > Running option rom at c000:0003
> > > Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > 
> > > and later
> > > 
> > > SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > ACPI: no PS/2 keyboard present  
> it was a bug on SeaBIOS side, we need it to parse Alias term in AML
> instead of choking on it
> 
> proposed patch:
>  https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/
> 
> PS:
> it's probably too late for it to make into 7.2

Right. So revert?
Igor Mammedov Nov. 21, 2022, 7:23 a.m. UTC | #6 
On Sat, 19 Nov 2022 12:22:13 -0500
"Michael S. Tsirkin" <mst@redhat.com> wrote:

> On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >   
> > > On Thu, 17 Nov 2022 22:51:46 +0100
> > > Volker Rümelin <vr_qemu@t-online.de> wrote:  
> > [...]  
> > > > since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
> > > > there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
> > > > the PS/2 keyboard without issues.
> > > > 
> > > > Here are a few lines from the SeaBIOS debug log.
> > > > 
> > > > table(50434146)=0x007e1971 (via rsdt)
> > > > ACPI: parse DSDT at 0x007e0040 (len 6449)
> > > > parse_termlist: parse error, skip from 92/465
> > > > Scan for VGA option rom
> > > > Running option rom at c000:0003
> > > > Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > > 
> > > > and later
> > > > 
> > > > SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > > ACPI: no PS/2 keyboard present    
> > it was a bug on SeaBIOS side, we need it to parse Alias term in AML
> > instead of choking on it
> > 
> > proposed patch:
> >  https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/
> > 
> > PS:
> > it's probably too late for it to make into 7.2  
> 
> Right. So revert?

let me check first what happens with migration case,
and maybe I can come up with a temporary hack to avoid aliases on QEMU side,
probably it will be something ugly but should do the job

>
Igor Mammedov Nov. 21, 2022, 7:27 a.m. UTC | #7 
On Sat, 19 Nov 2022 09:49:39 +0100
Volker Rümelin <vr_qemu@t-online.de> wrote:

> Am 18.11.22 um 15:55 schrieb Igor Mammedov:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov <imammedo@redhat.com> wrote:
> >  
> >> On Thu, 17 Nov 2022 22:51:46 +0100
> >> Volker Rümelin <vr_qemu@t-online.de> wrote:  
> > [...]  
> >>> since this patch SeaBIOS no longer detects the PS/2 keyboard. This means
> >>> there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect
> >>> the PS/2 keyboard without issues.
> >>>
> >>> Here are a few lines from the SeaBIOS debug log.
> >>>
> >>> table(50434146)=0x007e1971 (via rsdt)
> >>> ACPI: parse DSDT at 0x007e0040 (len 6449)
> >>> parse_termlist: parse error, skip from 92/465
> >>> Scan for VGA option rom
> >>> Running option rom at c000:0003
> >>> Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> >>>
> >>> and later
> >>>
> >>> SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> >>> ACPI: no PS/2 keyboard present  
> > it was a bug on SeaBIOS side, we need it to parse Alias term in AML
> > instead of choking on it
> >
> > proposed patch:
> >   https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/
> >
> > PS:
> > it's probably too late for it to make into 7.2
> >  
> 
> The proposed patch works.
> 
> It may still be an option to revert the commit 47a373faa6 (acpi: pc/q35: 
> drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration 
> generate AML). If an older QEMU version is migrated to QEMU 7.2.0 and 
> later and the guest reboots afterwards, it may end up without a working 
> keyboard because the migrated SeaBIOS is an older version.

ACPI blobs generated on old QEMU should be migrated as well,
so I'd expect it should be fine.
Problem will manifest itself only after VM was shut down and started anew.

Anyways lets see if a QEMU workaround is possible.

> With best regards,
> Volker
>
Michael S. Tsirkin Nov. 21, 2022, 7:50 a.m. UTC | #8 
On Mon, Nov 21, 2022 at 08:23:15AM +0100, Igor Mammedov wrote:
> On Sat, 19 Nov 2022 12:22:13 -0500
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
> 
> > On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> > > On Fri, 18 Nov 2022 14:08:36 +0100
> > > Igor Mammedov <imammedo@redhat.com> wrote:
> > >   
> > > > On Thu, 17 Nov 2022 22:51:46 +0100
> > > > Volker Rümelin <vr_qemu@t-online.de> wrote:  
> > > [...]  
> > > > > since this patch SeaBIOS no longer detects the PS/2 keyboard. This means 
> > > > > there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux detect 
> > > > > the PS/2 keyboard without issues.
> > > > > 
> > > > > Here are a few lines from the SeaBIOS debug log.
> > > > > 
> > > > > table(50434146)=0x007e1971 (via rsdt)
> > > > > ACPI: parse DSDT at 0x007e0040 (len 6449)
> > > > > parse_termlist: parse error, skip from 92/465
> > > > > Scan for VGA option rom
> > > > > Running option rom at c000:0003
> > > > > Start SeaVGABIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > > > 
> > > > > and later
> > > > > 
> > > > > SeaBIOS (version rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org)
> > > > > ACPI: no PS/2 keyboard present    
> > > it was a bug on SeaBIOS side, we need it to parse Alias term in AML
> > > instead of choking on it
> > > 
> > > proposed patch:
> > >  https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/RGPL7HESH5U5JRLEO6FP77CZVHZK5J65/
> > > 
> > > PS:
> > > it's probably too late for it to make into 7.2  
> > 
> > Right. So revert?
> 
> let me check first what happens with migration case,
> and maybe I can come up with a temporary hack to avoid aliases on QEMU side,
> probably it will be something ugly but should do the job
> 
> > 

Given the timing I'd prefer the revert. But if you insist let's see how
small that turns out to be.
diff mbox series

Patch

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 26932b4e2c..e1483bb11a 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -435,10 +435,6 @@  static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
             pc = PCI_DEVICE_GET_CLASS(pdev);
             dc = DEVICE_GET_CLASS(pdev);
 
-            if (pc->class_id == PCI_CLASS_BRIDGE_ISA) {
-                continue;
-            }
-
             /*
              * Cold plugged bridges aren't themselves hot-pluggable.
              * Hotplugged bridges *are* hot-pluggable.
@@ -1006,7 +1002,6 @@  static void build_piix4_pci0_int(Aml *table)
 {
     Aml *dev;
     Aml *crs;
-    Aml *field;
     Aml *method;
     uint32_t irqs;
     Aml *sb_scope = aml_scope("_SB");
@@ -1015,13 +1010,6 @@  static void build_piix4_pci0_int(Aml *table)
     aml_append(pci0_scope, build_prt(true));
     aml_append(sb_scope, pci0_scope);
 
-    field = aml_field("PCI0.ISA.P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
-    aml_append(field, aml_named_field("PRQ0", 8));
-    aml_append(field, aml_named_field("PRQ1", 8));
-    aml_append(field, aml_named_field("PRQ2", 8));
-    aml_append(field, aml_named_field("PRQ3", 8));
-    aml_append(sb_scope, field);
-
     aml_append(sb_scope, build_irq_status_method());
     aml_append(sb_scope, build_iqcr_method(true));
 
@@ -1125,7 +1113,6 @@  static Aml *build_q35_routing_table(const char *str)
 
 static void build_q35_pci0_int(Aml *table)
 {
-    Aml *field;
     Aml *method;
     Aml *sb_scope = aml_scope("_SB");
     Aml *pci0_scope = aml_scope("PCI0");
@@ -1162,18 +1149,6 @@  static void build_q35_pci0_int(Aml *table)
     aml_append(pci0_scope, method);
     aml_append(sb_scope, pci0_scope);
 
-    field = aml_field("PCI0.ISA.PIRQ", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
-    aml_append(field, aml_named_field("PRQA", 8));
-    aml_append(field, aml_named_field("PRQB", 8));
-    aml_append(field, aml_named_field("PRQC", 8));
-    aml_append(field, aml_named_field("PRQD", 8));
-    aml_append(field, aml_reserved_field(0x20));
-    aml_append(field, aml_named_field("PRQE", 8));
-    aml_append(field, aml_named_field("PRQF", 8));
-    aml_append(field, aml_named_field("PRQG", 8));
-    aml_append(field, aml_named_field("PRQH", 8));
-    aml_append(sb_scope, field);
-
     aml_append(sb_scope, build_irq_status_method());
     aml_append(sb_scope, build_iqcr_method(false));
 
@@ -1238,54 +1213,6 @@  static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
     return dev;
 }
 
-static void build_q35_isa_bridge(Aml *table)
-{
-    Aml *dev;
-    Aml *scope;
-    Object *obj;
-    bool ambiguous;
-
-    /*
-     * temporarily fish out isa bridge, build_q35_isa_bridge() will be dropped
-     * once PCI is converted to AcpiDevAmlIf and would be ble to generate
-     * AML for bridge itself
-     */
-    obj = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambiguous);
-    assert(obj && !ambiguous);
-
-    scope =  aml_scope("_SB.PCI0");
-    dev = aml_device("ISA");
-    aml_append(dev, aml_name_decl("_ADR", aml_int(0x001F0000)));
-
-    call_dev_aml_func(DEVICE(obj), dev);
-    aml_append(scope, dev);
-    aml_append(table, scope);
-}
-
-static void build_piix4_isa_bridge(Aml *table)
-{
-    Aml *dev;
-    Aml *scope;
-    Object *obj;
-    bool ambiguous;
-
-    /*
-     * temporarily fish out isa bridge, build_piix4_isa_bridge() will be dropped
-     * once PCI is converted to AcpiDevAmlIf and would be ble to generate
-     * AML for bridge itself
-     */
-    obj = object_resolve_path_type("", TYPE_PIIX3_PCI_DEVICE, &ambiguous);
-    assert(obj && !ambiguous);
-
-    scope =  aml_scope("_SB.PCI0");
-    dev = aml_device("ISA");
-    aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010000)));
-
-    call_dev_aml_func(DEVICE(obj), dev);
-    aml_append(scope, dev);
-    aml_append(table, scope);
-}
-
 static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
 {
     Aml *scope;
@@ -1465,7 +1392,6 @@  build_dsdt(GArray *table_data, BIOSLinker *linker,
         aml_append(sb_scope, dev);
         aml_append(dsdt, sb_scope);
 
-        build_piix4_isa_bridge(dsdt);
         if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
             build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
         }
@@ -1510,7 +1436,6 @@  build_dsdt(GArray *table_data, BIOSLinker *linker,
 
         aml_append(dsdt, sb_scope);
 
-        build_q35_isa_bridge(dsdt);
         if (pm->pcihp_bridge_en) {
             build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
         }
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 8694e58b21..0b0a83e080 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -809,6 +809,7 @@  static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
 
 static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
+    Aml *field;
     BusChild *kid;
     ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
     BusState *bus = BUS(s->isa_bus);
@@ -816,6 +817,28 @@  static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
     /* ICH9 PCI to ISA irq remapping */
     aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG,
                                            aml_int(0x60), 0x0C));
+    /* Fields declarion has to happen *after* operation region */
+    field = aml_field("PIRQ", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+    aml_append(field, aml_named_field("PRQA", 8));
+    aml_append(field, aml_named_field("PRQB", 8));
+    aml_append(field, aml_named_field("PRQC", 8));
+    aml_append(field, aml_named_field("PRQD", 8));
+    aml_append(field, aml_reserved_field(0x20));
+    aml_append(field, aml_named_field("PRQE", 8));
+    aml_append(field, aml_named_field("PRQF", 8));
+    aml_append(field, aml_named_field("PRQG", 8));
+    aml_append(field, aml_named_field("PRQH", 8));
+    aml_append(scope, field);
+
+    /* hack: put fields into _SB scope for LNKx to find them */
+    aml_append(scope, aml_alias("PRQA", "\\_SB.PRQA"));
+    aml_append(scope, aml_alias("PRQB", "\\_SB.PRQB"));
+    aml_append(scope, aml_alias("PRQC", "\\_SB.PRQC"));
+    aml_append(scope, aml_alias("PRQD", "\\_SB.PRQD"));
+    aml_append(scope, aml_alias("PRQE", "\\_SB.PRQE"));
+    aml_append(scope, aml_alias("PRQF", "\\_SB.PRQF"));
+    aml_append(scope, aml_alias("PRQG", "\\_SB.PRQG"));
+    aml_append(scope, aml_alias("PRQH", "\\_SB.PRQH"));
 
     QTAILQ_FOREACH(kid, &bus->children, sibling) {
             call_dev_aml_func(DEVICE(kid->child), scope);
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 808fd4eadf..f9b4af5c05 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -316,12 +316,27 @@  static void pci_piix3_realize(PCIDevice *dev, Error **errp)
 
 static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
+    Aml *field;
     BusChild *kid;
     BusState *bus = qdev_get_child_bus(DEVICE(adev), "isa.0");
 
     /* PIIX PCI to ISA irq remapping */
     aml_append(scope, aml_operation_region("P40C", AML_PCI_CONFIG,
-                                         aml_int(0x60), 0x04));
+                                           aml_int(0x60), 0x04));
+    /* Fields declarion has to happen *after* operation region */
+    field = aml_field("P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+    aml_append(field, aml_named_field("PRQ0", 8));
+    aml_append(field, aml_named_field("PRQ1", 8));
+    aml_append(field, aml_named_field("PRQ2", 8));
+    aml_append(field, aml_named_field("PRQ3", 8));
+    aml_append(scope, field);
+
+    /* hack: put fields into _SB scope for LNKx to find them */
+    aml_append(scope, aml_alias("PRQ0", "\\_SB.PRQ0"));
+    aml_append(scope, aml_alias("PRQ1", "\\_SB.PRQ1"));
+    aml_append(scope, aml_alias("PRQ2", "\\_SB.PRQ2"));
+    aml_append(scope, aml_alias("PRQ3", "\\_SB.PRQ3"));
+
     QTAILQ_FOREACH(kid, &bus->children, sibling) {
         call_dev_aml_func(DEVICE(kid->child), scope);
     }