[PULL,14/14] MAINTAINERS: Inherit from nanoMIPS

Commit Message

Philippe Mathieu-Daudé Nov. 7, 2022, 11:58 p.m. UTC

6 months ago Stefan Pejic stepped in as nanoMIPS maintainer
(see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS
ISA support in QEMU"), however today his email is bouncing:

  ** Message blocked **

  Your message to [e-mail] has been blocked. See technical details below for more information.

  The response from the remote server was:
  550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com]

To avoid unmaintained code, I feel forced to merge this code
back with the generic MIPS section.

Historical references:
- https://lore.kernel.org/qemu-devel/[e-mail]/
- https://lore.kernel.org/qemu-devel/[e-mail]/

Cc: Vince Del Vecchio <[e-mail]>
Reviewed-by: Richard Henderson <[e-mail]>
Message-Id: <[e-mail]>
Tested-by: Thomas Huth <[e-mail]>
Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
Message-Id: <[e-mail]>
---
 MAINTAINERS | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 4adf8c65db..86bcd07a31 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -237,16 +237,10 @@  R: Jiaxun Yang <[e-mail]>
 R: Aleksandar Rikalo <[e-mail]>
 S: Odd Fixes
 F: target/mips/
-F: disas/mips.c
+F: disas/*mips.c
 F: docs/system/cpu-models-mips.rst.inc
 F: tests/tcg/mips/
 
-MIPS TCG CPUs (nanoMIPS ISA)
-M: Stefan Pejic <[e-mail]>
-S: Maintained
-F: disas/nanomips.*
-F: target/mips/tcg/*nanomips*
-
 NiosII TCG CPUs
 M: Chris Wulff <[e-mail]>
 M: Marek Vasut <[e-mail]>