| Message ID | 20221201140811.142123-12-bmeng@tinylab.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [01/15] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC | expand |
On Fri, Dec 2, 2022 at 12:11 AM Bin Meng <bmeng@tinylab.org> wrote: > > Commit 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") > changed the value of VIRT_IRQCHIP_NUM_SOURCES from 127 to 53, which > is VIRTIO_NDEV and also used as the value of "riscv,ndev" property > in the dtb. Unfortunately this is wrong as VIRT_IRQCHIP_NUM_SOURCES > should include interrupt source 0 but "riscv,ndev" does not. > > While we are here, we also fix the comments of platform bus irq range > which is now "64 to 96", but should be "64 to 95", introduced since > commit 1832b7cb3f64 ("hw/riscv: virt: Create a platform bus"). > > Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") > Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > include/hw/riscv/virt.h | 5 ++--- > hw/riscv/virt.c | 3 ++- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h > index be4ab8fe7f..7c23aea4a0 100644 > --- a/include/hw/riscv/virt.h > +++ b/include/hw/riscv/virt.h > @@ -87,15 +87,14 @@ enum { > VIRTIO_IRQ = 1, /* 1 to 8 */ > VIRTIO_COUNT = 8, > PCIE_IRQ = 0x20, /* 32 to 35 */ > - VIRT_PLATFORM_BUS_IRQ = 64, /* 64 to 96 */ > - VIRTIO_NDEV = 96 /* Arbitrary maximum number of interrupts */ > + VIRT_PLATFORM_BUS_IRQ = 64, /* 64 to 95 */ > }; > > #define VIRT_PLATFORM_BUS_NUM_IRQS 32 > > #define VIRT_IRQCHIP_IPI_MSI 1 > #define VIRT_IRQCHIP_NUM_MSIS 255 > -#define VIRT_IRQCHIP_NUM_SOURCES VIRTIO_NDEV > +#define VIRT_IRQCHIP_NUM_SOURCES 96 > #define VIRT_IRQCHIP_NUM_PRIO_BITS 3 > #define VIRT_IRQCHIP_MAX_GUESTS_BITS 3 > #define VIRT_IRQCHIP_MAX_GUESTS ((1U << VIRT_IRQCHIP_MAX_GUESTS_BITS) - 1U) > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index a5bc7353b4..c4ee489a80 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -468,7 +468,8 @@ static void create_fdt_socket_plic(RISCVVirtState *s, > plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); > qemu_fdt_setprop_cells(mc->fdt, plic_name, "reg", > 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size); > - qemu_fdt_setprop_cell(mc->fdt, plic_name, "riscv,ndev", VIRTIO_NDEV); > + qemu_fdt_setprop_cell(mc->fdt, plic_name, "riscv,ndev", > + VIRT_IRQCHIP_NUM_SOURCES - 1); > riscv_socket_fdt_write_id(mc, mc->fdt, plic_name, socket); > qemu_fdt_setprop_cell(mc->fdt, plic_name, "phandle", > plic_phandles[socket]); > -- > 2.34.1 > >
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index be4ab8fe7f..7c23aea4a0 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -87,15 +87,14 @@ enum { VIRTIO_IRQ = 1, /* 1 to 8 */ VIRTIO_COUNT = 8, PCIE_IRQ = 0x20, /* 32 to 35 */ - VIRT_PLATFORM_BUS_IRQ = 64, /* 64 to 96 */ - VIRTIO_NDEV = 96 /* Arbitrary maximum number of interrupts */ + VIRT_PLATFORM_BUS_IRQ = 64, /* 64 to 95 */ }; #define VIRT_PLATFORM_BUS_NUM_IRQS 32 #define VIRT_IRQCHIP_IPI_MSI 1 #define VIRT_IRQCHIP_NUM_MSIS 255 -#define VIRT_IRQCHIP_NUM_SOURCES VIRTIO_NDEV +#define VIRT_IRQCHIP_NUM_SOURCES 96 #define VIRT_IRQCHIP_NUM_PRIO_BITS 3 #define VIRT_IRQCHIP_MAX_GUESTS_BITS 3 #define VIRT_IRQCHIP_MAX_GUESTS ((1U << VIRT_IRQCHIP_MAX_GUESTS_BITS) - 1U) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index a5bc7353b4..c4ee489a80 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -468,7 +468,8 @@ static void create_fdt_socket_plic(RISCVVirtState *s, plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); qemu_fdt_setprop_cells(mc->fdt, plic_name, "reg", 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size); - qemu_fdt_setprop_cell(mc->fdt, plic_name, "riscv,ndev", VIRTIO_NDEV); + qemu_fdt_setprop_cell(mc->fdt, plic_name, "riscv,ndev", + VIRT_IRQCHIP_NUM_SOURCES - 1); riscv_socket_fdt_write_id(mc, mc->fdt, plic_name, socket); qemu_fdt_setprop_cell(mc->fdt, plic_name, "phandle", plic_phandles[socket]);
Commit 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") changed the value of VIRT_IRQCHIP_NUM_SOURCES from 127 to 53, which is VIRTIO_NDEV and also used as the value of "riscv,ndev" property in the dtb. Unfortunately this is wrong as VIRT_IRQCHIP_NUM_SOURCES should include interrupt source 0 but "riscv,ndev" does not. While we are here, we also fix the comments of platform bus irq range which is now "64 to 96", but should be "64 to 95", introduced since commit 1832b7cb3f64 ("hw/riscv: virt: Create a platform bus"). Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") Signed-off-by: Bin Meng <bmeng@tinylab.org> --- include/hw/riscv/virt.h | 5 ++--- hw/riscv/virt.c | 3 ++- 2 files changed, 4 insertions(+), 4 deletions(-)