| Message ID | 20221207100335.290481-8-bmeng@tinylab.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC | expand |
On Wed, Dec 7, 2022 at 8:06 PM Bin Meng <bmeng@tinylab.org> wrote: > > The realize() callback has an errp for us to propagate the error up. > While we are here, corret the wrong multi-line comment format. > > Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > > --- > > Changes in v2: > - new patch: "hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic_realize()" > > hw/intc/sifive_plic.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > index c9af94a888..9cb4c6d6d4 100644 > --- a/hw/intc/sifive_plic.c > +++ b/hw/intc/sifive_plic.c > @@ -379,7 +379,8 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) > s->m_external_irqs = g_malloc(sizeof(qemu_irq) * s->num_harts); > qdev_init_gpio_out(dev, s->m_external_irqs, s->num_harts); > > - /* We can't allow the supervisor to control SEIP as this would allow the > + /* > + * We can't allow the supervisor to control SEIP as this would allow the > * supervisor to clear a pending external interrupt which will result in > * lost a interrupt in the case a PLIC is attached. The SEIP bit must be > * hardware controlled when a PLIC is attached. > @@ -387,8 +388,8 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) > for (i = 0; i < s->num_harts; i++) { > RISCVCPU *cpu = RISCV_CPU(qemu_get_cpu(s->hartid_base + i)); > if (riscv_cpu_claim_interrupts(cpu, MIP_SEIP) < 0) { > - error_report("SEIP already claimed"); > - exit(1); > + error_setg(errp, "SEIP already claimed"); > + return; > } > } > > -- > 2.34.1 > >
On 7/12/22 11:03, Bin Meng wrote: > The realize() callback has an errp for us to propagate the error up. > While we are here, corret the wrong multi-line comment format. Typo "correct" Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Signed-off-by: Bin Meng <bmeng@tinylab.org> > > --- > > Changes in v2: > - new patch: "hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic_realize()" > > hw/intc/sifive_plic.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index c9af94a888..9cb4c6d6d4 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -379,7 +379,8 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) s->m_external_irqs = g_malloc(sizeof(qemu_irq) * s->num_harts); qdev_init_gpio_out(dev, s->m_external_irqs, s->num_harts); - /* We can't allow the supervisor to control SEIP as this would allow the + /* + * We can't allow the supervisor to control SEIP as this would allow the * supervisor to clear a pending external interrupt which will result in * lost a interrupt in the case a PLIC is attached. The SEIP bit must be * hardware controlled when a PLIC is attached. @@ -387,8 +388,8 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) for (i = 0; i < s->num_harts; i++) { RISCVCPU *cpu = RISCV_CPU(qemu_get_cpu(s->hartid_base + i)); if (riscv_cpu_claim_interrupts(cpu, MIP_SEIP) < 0) { - error_report("SEIP already claimed"); - exit(1); + error_setg(errp, "SEIP already claimed"); + return; } }
The realize() callback has an errp for us to propagate the error up. While we are here, corret the wrong multi-line comment format. Signed-off-by: Bin Meng <bmeng@tinylab.org> --- Changes in v2: - new patch: "hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic_realize()" hw/intc/sifive_plic.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)