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Iglesias" , David Gibson Subject: [PATCH-for-8.0 1/4] cputlb: Restrict SavedIOTLB to system emulation Date: Wed, 7 Dec 2022 18:41:26 +0100 Message-Id: <20221207174129.77593-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221207174129.77593-1-philmd@linaro.org> References: <20221207174129.77593-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in case of reset") added the SavedIOTLB structure -- which is system emulation specific -- in the generic CPUState structure. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cputlb.c | 4 ++-- include/hw/core/cpu.h | 6 ++++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f1c00682b..0ea96fbcdf 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1395,7 +1395,7 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEntryFull *full, static void save_iotlb_data(CPUState *cs, MemoryRegionSection *section, hwaddr mr_offset) { -#ifdef CONFIG_PLUGIN +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY) SavedIOTLB *saved = &cs->saved_iotlb; saved->section = section; saved->mr_offset = mr_offset; @@ -1699,7 +1699,7 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, return qemu_ram_addr_from_host_nofail(p); } -#ifdef CONFIG_PLUGIN +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY) /* * Perform a TLB lookup and populate the qemu_plugin_hwaddr structure. * This should be a hot path as we will have just looked this path up diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 8830546121..bc3229ae13 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -222,7 +222,7 @@ struct CPUWatchpoint { QTAILQ_ENTRY(CPUWatchpoint) entry; }; -#ifdef CONFIG_PLUGIN +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY) /* * For plugins we sometime need to save the resolved iotlb data before * the memory regions get moved around by io_writex. @@ -406,9 +406,11 @@ struct CPUState { #ifdef CONFIG_PLUGIN GArray *plugin_mem_cbs; +#if !defined(CONFIG_USER_ONLY) /* saved iotlb data from io_writex */ SavedIOTLB saved_iotlb; -#endif +#endif /* !CONFIG_USER_ONLY */ +#endif /* CONFIG_PLUGIN */ /* TODO Move common fields from CPUArchState here. */ int cpu_index;