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target/mips: Add nanoMIPS ISA support in QEMU

Message ID 20221209123550.98139-1-milica.lazarevic@syrmia.com (mailing list archive)
State New, archived
Headers show
Series target/mips: Add nanoMIPS ISA support in QEMU | expand

Commit Message

Milica Lazarevic Dec. 9, 2022, 12:35 p.m. UTC 
nanoMIPS ISA support is planned to be maintained.

Signed-off-by: Milica Lazarevic <milica.lazarevic@syrmia.com>
---
 MAINTAINERS | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
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Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 6966490c94..66e083b455 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -237,10 +237,16 @@  R: Jiaxun Yang <jiaxun.yang@flygoat.com>
 R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
 S: Odd Fixes
 F: target/mips/
-F: disas/*mips.c
+F: disas/mips.c
 F: docs/system/cpu-models-mips.rst.inc
 F: tests/tcg/mips/
 
+MIPS TCG CPUs (nanoMIPS ISA)
+M: Milica Lazarevic <milica.lazarevic@syrmia.com>
+S: Maintained
+F: disas/nanomips.c
+F: target/mips/tcg/*nanomips*
+
 NiosII TCG CPUs
 M: Chris Wulff <crwulff@gmail.com>
 M: Marek Vasut <marex@denx.de>