diff mbox series

[v3,15/16] hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization

Message ID 20221211030829.802437-15-bmeng@tinylab.org (mailing list archive)
State New, archived
Headers show
Series [v3,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC | expand

Commit Message

Bin Meng Dec. 11, 2022, 3:08 a.m. UTC
"hartid-base" and "priority-base" are zero by default. There is no
need to initialize them to zero again.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
---

(no changes since v1)

 hw/riscv/opentitan.c | 2 --
 1 file changed, 2 deletions(-)

Comments

Alistair Francis Dec. 12, 2022, 5:45 a.m. UTC | #1
On Sun, Dec 11, 2022 at 1:22 PM Bin Meng <bmeng@tinylab.org> wrote:
>
> "hartid-base" and "priority-base" are zero by default. There is no
> need to initialize them to zero again.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
> Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
> (no changes since v1)
>
>  hw/riscv/opentitan.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index 78f895d773..85ffdac5be 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -173,10 +173,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
>
>      /* PLIC */
>      qdev_prop_set_string(DEVICE(&s->plic), "hart-config", "M");
> -    qdev_prop_set_uint32(DEVICE(&s->plic), "hartid-base", 0);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "num-sources", 180);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "num-priorities", 3);
> -    qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32);
> --
> 2.34.1
>
>
diff mbox series

Patch

diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 78f895d773..85ffdac5be 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -173,10 +173,8 @@  static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
 
     /* PLIC */
     qdev_prop_set_string(DEVICE(&s->plic), "hart-config", "M");
-    qdev_prop_set_uint32(DEVICE(&s->plic), "hartid-base", 0);
     qdev_prop_set_uint32(DEVICE(&s->plic), "num-sources", 180);
     qdev_prop_set_uint32(DEVICE(&s->plic), "num-priorities", 3);
-    qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00);
     qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000);
     qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000);
     qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32);