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[201.43.103.101]) by smtp.gmail.com with ESMTPSA id w8-20020a056871060800b0014c8685f229sm514577oan.10.2022.12.21.10.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Dec 2022 10:23:44 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, Daniel Henrique Barboza , Bin Meng Subject: [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt() Date: Wed, 21 Dec 2022 15:22:58 -0300 Message-Id: <20221221182300.307900-14-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221221182300.307900-1-dbarboza@ventanamicro.com> References: <20221221182300.307900-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::29; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x29.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'mem_size' and 'cmdline' aren't being used and the MachineState pointer is being retrieved via a MACHINE() macro. Remove 'mem_size' and 'cmdline' and add MachineState as a parameter. Signed-off-by: Daniel Henrique Barboza --- hw/riscv/spike.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 2b9af5689e..181bf394a0 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -48,15 +48,14 @@ static const MemMapEntry spike_memmap[] = { [SPIKE_DRAM] = { 0x80000000, 0x0 }, }; -static void create_fdt(SpikeState *s, const MemMapEntry *memmap, - uint64_t mem_size, const char *cmdline, bool is_32_bit) +static void create_fdt(MachineState *mc, SpikeState *s, + const MemMapEntry *memmap, bool is_32_bit) { void *fdt; int fdt_size; uint64_t addr, size; unsigned long clint_addr; int cpu, socket; - MachineState *mc = MACHINE(s); uint32_t *clint_cells; uint32_t cpu_phandle, intc_phandle, phandle = 1; char *name, *mem_name, *clint_name, *clust_name; @@ -254,8 +253,7 @@ static void spike_board_init(MachineState *machine) mask_rom); /* Create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, - riscv_is_32bit(&s->soc[0])); + create_fdt(machine, s, memmap, riscv_is_32bit(&s->soc[0])); /* * Not like other RISC-V machines that use plain binary bios images,