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[201.43.103.101]) by smtp.gmail.com with ESMTPSA id w8-20020a056871060800b0014c8685f229sm514577oan.10.2022.12.21.10.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Dec 2022 10:23:49 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, Daniel Henrique Barboza , Bin Meng , Palmer Dabbelt Subject: [PATCH 15/15] hw/riscv/sifive_u: simplify create_fdt() Date: Wed, 21 Dec 2022 15:23:00 -0300 Message-Id: <20221221182300.307900-16-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221221182300.307900-1-dbarboza@ventanamicro.com> References: <20221221182300.307900-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org cmdline' isn't being used. A MachineState pointer is being retrieved via a MACHINE() macro calling qdev_get_machine(). 'mem_size' is being set as machine->ram_size. Remove the 'cmdline' and 'mem_size' parameters, add MachineState as a parameter to avoid the cast and retrieve 'mem_size' via ms->ram_size. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza --- hw/riscv/sifive_u.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0c9bf7fe6a..97a561dc52 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -93,10 +93,10 @@ static const MemMapEntry sifive_u_memmap[] = { #define OTP_SERIAL 1 #define GEM_REVISION 0x10070109 -static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, - uint64_t mem_size, const char *cmdline, bool is_32_bit) +static void create_fdt(MachineState *ms, SiFiveUState *s, + const MemMapEntry *memmap, bool is_32_bit) { - MachineState *ms = MACHINE(qdev_get_machine()); + uint64_t mem_size = ms->ram_size; void *fdt; int cpu, fdt_size; uint32_t *cells; @@ -560,8 +560,7 @@ static void sifive_u_machine_init(MachineState *machine) qemu_allocate_irq(sifive_u_machine_reset, NULL, 0)); /* create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, - riscv_is_32bit(&s->soc.u_cpus)); + create_fdt(machine, s, memmap, riscv_is_32bit(&s->soc.u_cpus)); if (s->start_in_flash) { /*