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([191.17.222.139]) by smtp.gmail.com with ESMTPSA id d20-20020a056830139400b0066db09fb1b5sm9267205otq.66.2022.12.29.10.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 10:12:07 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, Daniel Henrique Barboza , Bin Meng , Palmer Dabbelt , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bin Meng Subject: [PATCH v4 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Date: Thu, 29 Dec 2022 15:11:32 -0300 Message-Id: <20221229181135.270661-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221229181135.270661-1-dbarboza@ventanamicro.com> References: <20221229181135.270661-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22c; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/riscv/boot.c | 6 ++++-- hw/riscv/microchip_pfsoc.c | 3 +-- hw/riscv/sifive_u.c | 3 +-- hw/riscv/spike.c | 3 +-- hw/riscv/virt.c | 3 +-- include/hw/riscv/boot.h | 3 +-- 6 files changed, 9 insertions(+), 12 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 8583732e4e..a78461cd14 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -206,9 +206,11 @@ target_ulong riscv_load_kernel(const char *kernel_filename, exit(1); } -void riscv_load_initrd(const char *filename, uint64_t mem_size, - uint64_t kernel_entry, void *fdt) +void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry) { + const char *filename = machine->initrd_filename; + uint64_t mem_size = machine->ram_size; + void *fdt = machine->fdt; hwaddr start, end; ssize_t size; diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 593a799549..1e9b0a420e 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -633,8 +633,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) kernel_start_addr, NULL); if (machine->initrd_filename) { - riscv_load_initrd(machine->initrd_filename, machine->ram_size, - kernel_entry, machine->fdt); + riscv_load_initrd(machine, kernel_entry); } if (machine->kernel_cmdline && *machine->kernel_cmdline) { diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3e6df87b5b..c40885ed5c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -602,8 +602,7 @@ static void sifive_u_machine_init(MachineState *machine) kernel_start_addr, NULL); if (machine->initrd_filename) { - riscv_load_initrd(machine->initrd_filename, machine->ram_size, - kernel_entry, machine->fdt); + riscv_load_initrd(machine, kernel_entry); } if (machine->kernel_cmdline && *machine->kernel_cmdline) { diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 60e2912be5..99dec74fe8 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -312,8 +312,7 @@ static void spike_board_init(MachineState *machine) htif_symbol_callback); if (machine->initrd_filename) { - riscv_load_initrd(machine->initrd_filename, machine->ram_size, - kernel_entry, machine->fdt); + riscv_load_initrd(machine, kernel_entry); } if (machine->kernel_cmdline && *machine->kernel_cmdline) { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 6c946b6def..02f1369843 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1285,8 +1285,7 @@ static void virt_machine_done(Notifier *notifier, void *data) kernel_start_addr, NULL); if (machine->initrd_filename) { - riscv_load_initrd(machine->initrd_filename, machine->ram_size, - kernel_entry, machine->fdt); + riscv_load_initrd(machine, kernel_entry); } if (machine->kernel_cmdline && *machine->kernel_cmdline) { diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index e37e1d1238..cfd72ecabf 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -46,8 +46,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, target_ulong riscv_load_kernel(const char *kernel_filename, target_ulong firmware_end_addr, symbol_fn_t sym_cb); -void riscv_load_initrd(const char *filename, uint64_t mem_size, - uint64_t kernel_entry, void *fdt); +void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry); uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt); void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts, hwaddr saddr,